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Transmitter Configuration
723
SPRUI07–March 2020
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Multichannel Buffered Serial Port (McBSP)
Table 12-53. Use of the Transmit Channel Enable Registers (continued)
Number of
Selectable
Channels
Block Assignments Channel Assignments
XCERx Block Assigned Bit in XCERx Channel Assigned
XCERB Channels m to (m + 15) XCE0 Channel m
XCE1 Channel (m + 1)
XCE2 Channel (m + 2)
: :
When XMCM = 01b or 10b, the block
of channels is chosen with the
XPBBLK bits. When XMCM = 11b,
the block is chosen with the RPBBLK
bits.
XCE15 Channel (m + 15)
128
(XMCME = 1)
XCERA Block 0 XCE0 Channel 0
XCE1 Channel 1
XCE2 Channel 2
: :
XCE15 Channel 15
XCERB Block 1 XCE0 Channel 16
XCE1 Channel 17
XCE2 Channel 18
: :
XCE15 Channel 31
XCERC Block 2 XCE0 Channel 32
XCE1 Channel 33
XCE2 Channel 34
: :
XCE15 Channel 47
XCERD Block 3 XCE0 Channel 48
XCE1 Channel 49
XCE2 Channel 50
: :
XCE15 Channel 63
XCERE Block 4 XCE0 Channel 64
XCE1 Channel 65
XCE2 Channel 66
: :
XCE15 Channel 79
XCERF Block 5 XCE0 Channel 80
XCE1 Channel 81
XCE2 Channel 82
: :
XCE15 Channel 95
XCERG Block 6 XCE0 Channel 96
XCE1 Channel 97
XCE2 Channel 98
: :
XCE15 Channel 111