Current conversion complete.
Digital result is written into
corresponding ADCRESULTn register
Conversion begins.
SEQ_CNTR bits are decremented by
one for every conversion
MAX_CONVn value gets loaded into
SEQ_CNTR bits in ADCASEQSR register
SOC trigger arrives
Initialize the ADC registers
All
conversions complete?
(SEQ_CNTR = 0?)
Set INT_SEQn
Stop
No
Yes
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ADC Interface
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SPRUI07–March 2020
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Analog-to-Digital Converter (ADC)
Figure 7-12. Flow Chart for Uninterrupted Autosequenced Mode
NOTE: The flow chart corresponds to CONT_RUN bit = 0 and INT_MOD_SEQn bit = 0.
7.3.3.1 Sequencer Start/Stop Mode (Sequencer Start/Stop Operation With Multiple Time-Sequenced
Triggers)
In addition to the uninterrupted autosequenced mode, any sequencer (SEQ1, SEQ2, or SEQ) can be
operated in a Stop/Start mode which is synchronized to multiple start-of-conversion (SOC) triggers,
separated in time. This mode is similar to Example 7-5, but the sequencer is allowed to be retriggered
without being reset to the initial state CONV00, once it has completed its first sequence (i.e., the
sequencer is not reset in the interrupt service routine). Therefore, when one conversion sequence ends,
the sequencer stays in the current conversion state. The continuous run bit (CONT_RUN) in the
ADCTRL1 register must be set to zero (that is, disabled) for this mode.
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