Texas Instruments TMS320 2833 Series User Manual

16
McBSP Receive
InterruptSelectLogic
MDXx
MDRx
ExpandLogic
DRR1ReceiveBuffer
RX
Interrupt
DRR2ReceiveBuffer
RBR1RegisterRBR2Register
MCLKXx
MFSXx
MCLKRx
MFSRx
16
CompandLogic
DXR2 TransmitBuffer
RSR1
XSR2
XSR1
PeripheralReadBus
16
16
16
16
16
RSR2
DXR1 TransmitBuffer
LSPCLK
MRINT
ToCPU
RXInterruptLogic
McBSP Transmit
InterruptSelectLogic
TX
Interrupt
MXINT
ToCPU
TXInterruptLogic
16
16 16
Bridge
DMA Bus
PeripheralBus
PeripheralWriteBus
CPU
CPU
CPU
Configuring Device Pins www.ti.com
660
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Multichannel Buffered Serial Port (McBSP)
12.1.2.1 McBSP Generic Block Diagram
The McBSP consists of a data-flow path and a control path connected to external devices by six pins as
shown in Figure 12-1. The figure and the text in this section use generic pin names.
Figure 12-1. Conceptual Block Diagram of the McBSP
A Not available in all devices. See the device-specific data sheet
12.2 Configuring Device Pins
The GPIO mux registers must be configured to connect this peripheral to the device pins. To avoid
glitches on the pins, the GPyGMUX bits must be configured first (while keeping the corresponding
GPyMUX bits at the default of zero), followed by writing the GPyMUX register to the desired value.
Some IO functionality is defined by GPIO register settings independent of this peripheral. For input
signals, the GPIO input qualification should be set to asynchronous mode by setting the appropriate
GPxQSELn register bits to 11b. The internal pullups can be configured in the GPyPUD register.
See the GPIO chapter for more details on GPIO mux and settings.
12.3 McBSP Operation
This section addresses the following topics:
• Data transfer process
• Companding (compressing and expanding) data
• Clocking and framing data

Texas Instruments TMS320 2833 Series Specifications

General

Brand	Texas Instruments
Model	TMS320 2833 Series
Category	Controller
Language	English