Transmitter Configuration
www.ti.com
722
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Multichannel Buffered Serial Port (McBSP)
Table 12-52. Register Bits Used to Enable/Disable Transmit Multichannel Selection
Register Bit Name Function Type
Reset
Value
MCR2 1-0 XMCM Transmit multichannel selection R/W 00
XMCM = 00b No transmit multichannel selection mode is on. All
channels are enabled and unmasked. No channels can
be disabled or masked.
XMCM = 01b All channels are disabled unless they are selected in the
appropriate transmit channel enable registers (XCERs).
If enabled, a channel in this mode is also unmasked.
The XMCME bit determines whether 32 channels or 128
channels are selectable in XCERs.
XMCM = 10b All channels are enabled, but they are masked unless
they are selected in the appropriate transmit channel
enable registers (XCERs).
The XMCME bit determines whether 32 channels or 128
channels are selectable in XCERs.
XMCM = 11b This mode is used for symmetric transmission and
reception.
All channels are disabled for transmission unless they
are enabled for reception in the appropriate receive
channel enable registers (RCERs). Once enabled, they
are masked unless they are also selected in the
appropriate transmit channel enable registers (XCERs).
The XMCME bit determines whether 32 channels or 128
channels are selectable in RCERs and XCERs.
12.9.7 XCERs Used in the Transmit Multichannel Selection Mode
For multichannel selection operation, the assignment of channels to the XCERs depends on whether 32 or
128 channels are individually selectable, as defined by the XMCME bit. These two cases are shown in
Table 12-96. The table shows which block of channels is assigned to each XCER that is used. For each
XCER, the table shows which channel is assigned to each of the bits.
NOTE: When XMCM = 11b (for symmetric transmission and reception), the transmitter uses the
receive channel enable registers (RCERs) to enable channels and uses the XCERs to
unmask channels for transmission.
Table 12-53. Use of the Transmit Channel Enable Registers
Number of
Selectable
Channels
Block Assignments Channel Assignments
XCERx Block Assigned Bit in XCERx Channel Assigned
32
(XMCME = 0)
XCERA Channels n to (n + 15) XCE0 Channel n
XCE1 Channel (n + 1)
XCE2 Channel (n + 2)
: :
When XMCM = 01b or 10b, the block
of channels is chosen with the
XPABLK bits. When XMCM = 11b,
the block is chosen with the RPABLK
bits.
XCE15 Channel (n + 15)
To Next Page
Loading...
Need help?
General
