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McBSP Registers
769
SPRUI07–March 2020
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Multichannel Buffered Serial Port (McBSP)
Table 12-94. Use of the Receive Channel Enable Registers (continued)
Number of
Selectable
Channels
Block Assignments Channel Assignments
RCERx Block Assigned Bit in RCERx Channel Assigned
RCERH Block 7 RCE0 Channel 112
RCE1 Channel 113
RCE2 Channel 114
: :
RCE15 Channel 127
12.15.11 Transmit Channel Enable Registers (XCERA, XCERB, XCERC, XCERD, XCERE,
XCERF, XCERG, XCERH)
Each McBSP has eight transmit channel enable registers of the form shown in Figure 12-81. There is one
for each of the transmit partitions: A, B, C, D, E, F, G, and H. Table 12-95 provides a summary description
that applies to each bit XCEx of a transmit channel enable register.
The XCERs are only used when the transmitter is configured to allow individual disabling/enabling and
masking/unmasking of the channels (XMCM is nonzero).
The transmit channel enable registers (XCERA...XCERH) are shown in Figure 12-81 and described in
Table 12-95.
Figure 12-81. Transmit Channel Enable Registers (XCERA...XCERH)
15 14 13 12 11 10 9 8
XCE15 XCE14 XCE13 XCE12 XCE11 XCE10 XCE9 XCE8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
XCE7 XCE6 XCE5 XCE4 XCE3 XCE2 XCE1 XCE0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 12-95. Transmit Channel Enable Registers (XCERA...XCERH) Field Descriptions
Bit Field Value Description
15-0 XCEx Transmit channel enable bit. The role of this bit depends on which transmit multichannel selection
mode is selected with the XMCM bits.
For multichannel selection when XMCM = 01b
(all channels disabled unless selected):
0 Disable and mask the channel that is mapped to XCEx.
1 Enable and unmask the channel that is mapped to XCEx.
For multichannel selection when XMCM = 10b
(all channels enabled but masked unless selected):
0 Mask the channel that is mapped to XCEx.
1 Unmask the channel that is mapped to XCEx.
For multichannel selection when XMCM = 11b
(all channels masked unless selected):
0 Mask the channel that is mapped to XCEx. Even if the channel is enabled by the corresponding
receive channel enable bit, this channel's data cannot appear on the DX pin.
1 Unmask the channel that is mapped to XCEx. If the channel is also enabled by the corresponding
receive channel enable bit, full transmission can occur.
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