eCAP Registers
www.ti.com
376
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Enhanced Capture (eCAP)
5.8.2.4 CAP2 Register (Offset = 6h) [reset = 0h]
CAP2 is shown in Figure 5-21 and described in Table 5-7.
Return to the Summary Table.
Capture 2 Register
Figure 5-21. CAP2 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CAP2
R/W-0h
Table 5-7. CAP2 Register Field Descriptions
Bit Field Type Reset Description
31-0 CAP2 R/W 0h
This register can be loaded (written) by:
- Time-Stamp ( counter value) during a capture event
- Software - may be useful for test purposes
- ACMP shadow register (CAP4) when used in APWM mode
Reset type: SYSRSn
To Next Page
Loading...