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Bootloader Code Overview
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SPRUI07–March 2020
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Boot ROM
2.4 Bootloader Code Overview
This chapter contains information on the Boot ROM version, checksum, and code.
2.4.1 Boot ROM Version and Checksum Information
The boot ROM contains its own version number located at address 0x3F FFBA. This version number
starts at 1 and will be incremented any time the boot ROM code is modified. The next address, 0x3F
FFBB contains the month and year (MM/YY in decimal) that the boot code was released. The next four
memory locations contain a checksum value for the boot ROM. The checksum is intended for TI internal
use and will change based on the silicon and boot ROM version.
Table 2-19. Bootloader Revision and Checksum Information
Address Contents
0x3F FFB9 Flash API silicon compatibility check. This location is read by some versions of
the flash API to make sure it is running on a compatible silicon version.
0x3F FFBA Boot ROM Version Number
0x3F FFBB MM/YY of release (in decimal)
0x3F FFBC Least significant word of checksum
0x3F FFBD . . .
0x3F FFBE . . .
0x3F FFBF Most significant word of checksum
Table 2-20 shows the boot ROM revision details.
Table 2-20. Bootloader Revision Per Device
Device(s) Silicon REVID
(Address 0x883)
Boot ROM
Revision
2823x, 2833x 0 (First silicon) Version 1
2823x, 2833x 1 Version 2
2.4.2 Bootloader Code Revision History
• Version: 2, Released: March 2008:
The following changes were made:
– Corrected the GPIO configuration for boot to XINTF x16, x32 and parallel XINTF modes.
– Updated the McBSP bootloader to echo back data received. Version 1 did not echo back the data.
– The eCAN loader leaves the SAM bit in its default state (0). Version 1 changed SAM to 1.
• Version: 1, Released: June 2007:
The initial release of the boot ROM.
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