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SPRUI07–March 2020
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Multichannel Buffered Serial Port (McBSP)
• Status bits for flagging exception/error conditions
• ABIS mode is not supported
12.1.2 McBSP Pins/Signals
Table 12-1 describes the McBSP interface pins and some internal signals.
Table 12-1. McBSP Interface Pins/Signals
McBSP-A Pin McBSP-B Pin Type Description
MCLKRA MCLKRB I/O Supplies or reflects the receive clock; supplys the input clock of the sample rate
generator
MCLKXA MCLKXB I/O Supplys or reflects the transmit clock; supplys the input clock of the sample rate
generator
MDRA MDRB I Serial data receive pin
MDXA MDXB O Serial data transmit pin
MFSRA MFSRB I/O Supplys or reflects the receive frame-sync signal; controlsg sample rate generator
synchronization when GSYNC = 1 (see Section 12.4.3)
MFSXA MFSXB I/O Supplys or reflects the transmit frame-sync signal
CPU Interrupt Signals
MRINT Receive interrupt to CPU
MXINT Transmit interrupt to CPU
DMA Events
REVT Receive synchronization event to DMA
XEVT Transmit synchronization event to DMA
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