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General-Purpose Input/Output (GPIO)
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SPRUI07–March 2020
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System Control and Interrupts
To plan configuration of the GPIO module, consider the following steps:
Step 1. Plan the device pin-out:
Through a pin multiplexing scheme, a lot of flexibility is provided for assigning functionality to the
GPIO-capable pins. Before getting started, look at the peripheral options available for each pin, and
plan pin-out for your specific system. Will the pin be used as a general purpose input or output (GPIO)
or as one of up to three available peripheral functions? Knowing this information will help determine
how to further configure the pin.
Step 2. Enable or disable internal pullup resistors:
To enable or disable the internal pullup resistors, write to the respective bits in the GPIO pullup disable
(GPAPUD, GPBPUD, and GPCPUD) registers. For pins that can function as ePWM output pins
(GPIO0-GPIO11), the internal pullup resistors are disabled by default. All other GPIO-capable pins
have the pullup enabled by default.
Step 3. Select input qualification:
If the pin will be used as an input, specify the required input qualification, if any. The input qualification
is specified in the GPACTRL, GPBCTRL, GPAQSEL1, GPAQSEL2, GPBQSEL1, and GPBQSEL2
registers. By default, all of the input signals are synchronized to SYSCLKOUT only.
Step 4. Select the pin function:
Configure the GPxMUXn registers such that the pin is a GPIO or one of three available peripheral
functions. By default, all GPIO-capable pins are configured at reset as general purpose input pins.
Step 5. For digital general purpose I/O, select the direction of the pin:
If the pin is configured as an GPIO, specify the direction of the pin as either input or output in the
GPADIR, GPBDIR, and GPCDIR registers. By default, all GPIO pins are inputs. To change the pin
from input to output, first load the output latch with the value to be driven by writing the appropriate
value to the GPxCLEAR, GPxSET, or GPxTOGGLE registers. Once the output latch is loaded, change
the pin direction from input to output via the GPxDIR registers. The output latch for all pins is cleared at
reset.
Step 6. Select low power mode wake-up sources:
Specify which pins, if any, will be able to wake the device from HALT and STANDBY low power
modes. The pins are specified in the GPIOLPMSEL register.
Step 7. Select external interrupt sources:
Specify the source for the XINT1 - XINT7, and XNMI interrupts. For each interrupt you can specify one
of the port A signals (for XINT1/2/3) or port B signals (XINT4/5/6/7) as the source. This is done by
specifying the source in the GPIOXINTnSEL, and GPIOXNMISEL registers. The polarity of the
interrupts can be configured in the XINTnCR, and the XNMICR registers as described in Section 1.6.5.
NOTE: There is a 2-SYSCLKOUT cycle delay from when a write to configuration registers such as
GPxMUXn and GPxQSELn occurs to when the action is valid
1.4.3 Digital General Purpose I/O Control
For pins that are configured as GPIO you can change the values on the pins by using the registers in
Table 1-41.
Table 1-41. GPIO Data Registers
Name Address Size (x16) Register Description Bit Description
GPADAT 0x6FC0 2 GPIO A Data Register (GPIO0-GPIO31) Figure 1-65
GPASET 0x6FC2 2 GPIO A Set Register (GPIO0-GPIO31) Figure 1-68
GPACLEAR 0x6FC4 2 GPIO A Clear Register (GPIO0-GPIO31) Figure 1-68
GPATOGGLE 0x6FC6 2 GPIO A Toggle Register (GPIO0-GPIO31) Figure 1-68
GPBDAT 0x6FC8 2 GPIO B Data Register (GPIO32-GPIO63) Figure 1-66
GPBSET 0x6FCA 2 GPIO B Set Register (GPIO32-GPIO63) Figure 1-69
GPBCLEAR 0x6FCC 2 GPIO B Clear Register (GPIO32-GPIO63) Figure 1-69
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