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eQEP Registers
413
SPRUI07–March 2020
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Enhanced Quadrature Encoder Pulse (eQEP)
6.10.2.1 QPOSCNT Register (Offset = 0h) [reset = 0h]
QPOSCNT is shown in Figure 6-21 and described in Table 6-6.
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Position Counter
Figure 6-21. QPOSCNT Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
QPOSCNT
R/W-0h
Table 6-6. QPOSCNT Register Field Descriptions
Bit Field Type Reset Description
31-0 QPOSCNT R/W 0h
Position Counter
This 32-bit position counter register counts up/down on every eQEP
pulse based on direction input. This counter acts as a position
integrator whose count value is proportional to position from a give
reference point. This Register acts as a Read ONLY register while
counter is counting up/down.
Note: It is recommended to only write to the position counter register
(QPOSCNT) during initialization, i.e. when the eQEP position
counter is disabled (QPEN bit of QEPCTL is zero). Once the position
counter is enabled (QPEN bit is one), writing to the eQEP position
counter register (QPOSCNT) may cause unexpected results.
Reset type: SYSRSn
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