ADC Registers
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SPRUI07–March 2020
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Analog-to-Digital Converter (ADC)
7.4.7 ADCCHSELSEQ4 Register (Offset = 6h) [reset = 0h]
ADCCHSELSEQ4 is shown in Figure 7-21 and described in Table 7-18.
Figure 7-21. ADCCHSELSEQ4 Register
15 14 13 12 11 10 9 8
CONV15 CONV14
R/W-0h R/W-0h
7 6 5 4 3 2 1 0
CONV13 CONV12
R/W-0h R/W-0h
Table 7-18. ADCCHSELSEQ4 Register Field Descriptions
Bit Field Type Reset Description
15-12 CONV15 R/W 0h
11-8 CONV14 R/W 0h
7-4 CONV13 R/W 0h
3-0 CONV12 R/W 0h
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