ADC Registers
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SPRUI07–March 2020
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Analog-to-Digital Converter (ADC)
7.4.13 ADCOFFTRIM Register (Offset = 1Dh) [reset = 0h]
ADCOFFTRIM is shown in Figure 7-28 and described in Table 7-25.
Figure 7-28. ADCOFFTRIM Register
15 14 13 12 11 10 9 8
RESERVED OFFSET_TRIM
[8:0]
R-0h R/W-0h
7 6 5 4 3 2 1 0
OFFSET_TRIM[8:0]
R/W-0h
Table 7-25. ADCOFFTRIM Register Field Descriptions
Bit Field Type Reset Description
15-9 RESERVED R 0h Reads return a zero. Writes have no effect.
8-0 OFFSET_TRIM[8:0] R/W 0h Offset trim value in LSBs, two's complement format - 256/255 range
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