Texas Instruments TMS320 2833 Series User Manual

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SPRUI07–March 2020
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Enhanced Quadrature Encoder Pulse (eQEP)
6.10.2.18 QCLR Register (Offset = 1Ah) [reset = 0h]
QCLR is shown in Figure 6-38 and described in Table 6-23.
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QEP Interrupt Clear
Figure 6-38. QCLR Register
15 14 13 12 11 10 9 8
RESERVED UTO IEL SEL PCM
R-0h R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h
7 6 5 4 3 2 1 0
PCR PCO PCU WTO QDC PHE PCE INT
R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h R-0/W1S-0h
Table 6-23. QCLR Register Field Descriptions
Bit Field Type Reset Description
15-12 RESERVED R 0h
Reserved
11 UTO R-0/W1S 0h
Clear unit time out interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag
10 IEL R-0/W1S 0h
Clear index event latch interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag
9 SEL R-0/W1S 0h
Clear strobe event latch interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag
8 PCM R-0/W1S 0h
Clear eQEP compare match event interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag
7 PCR R-0/W1S 0h
Clear position-compare ready interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag
6 PCO R-0/W1S 0h
Clear position counter overflow interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag
5 PCU R-0/W1S 0h
Clear position counter underflow interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag
4 WTO R-0/W1S 0h
Clear watchdog timeout interrupt flag
Reset type: SYSRSn
0h (R/W) = No effect
1h (R/W) = Clears the interrupt flag

Texas Instruments TMS320 2833 Series Specifications

General

Brand	Texas Instruments
Model	TMS320 2833 Series
Category	Controller
Language	English