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SPRUI07–March 2020
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System Control and Interrupts
1.5.3 Device Emulation Registers
These registers are used to control the protection mode of the C28x CPU and to monitor some critical
device signals. The registers are defined in Table 1-100.
Table 1-100. Device Emulation Registers
Name Address Size (x16) Description
DEVICECNF 0x0880
0x0881
2 Device Configuration Register
PARTID 0x380090 0x380090 1 Part ID Register
CLASSID 0x0882 1 Class ID Register
CLASSID 0x0882 1 Class ID Register
REVID 0x0883 1 Revision ID Register
PROTSTART 0x0884 1 Block Protection Start Address Register
PROTRANGE 0x0885 1 Block Protection Range Address Register
Figure 1-74. Device Configuration (DEVICECNF) Register
31 27 26 20 19 18 16
Reserved TRST Reserved ENPROT Reserved
R-0 R-0 R-0 R/W-1 R-111
15 5 4 3 2 0
Reserved XRS Res VMAPS Reserved
R-0 R-P R-0 R-1 R-011
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-101. DEVICECNF Register Field Descriptions
Bits Field Value Description
31-28 Reserved Reserved
27 TRST Read status of TRST signal. Reading this bit gives the current satus of the TRST signal.
0 No emulator is connected.
1 An emulator is connected.
26:20 Reserved
19 ENPROT Enable Write-Read Protection Mode Bit.
0 Disables write-read protection mode
1 Enables write-read protection as specified by the PROTSTART and PROTRANGE registers
18-6 Reserved Reserved
5 XRS Reset Input Signal Status. This is connected directly to the XRS input pin.
4 Reserved Reserved
3 VMAPS VMAP Configure Status. This indicates the status of VMAP.
2-0 Reserved Reserved
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