eQEP Registers
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SPRUI07–March 2020
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Enhanced Quadrature Encoder Pulse (eQEP)
6.10.2.15 QPOSCTL Register (Offset = 17h) [reset = 0h]
QPOSCTL is shown in Figure 6-35 and described in Table 6-20.
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Position Compare Control
Figure 6-35. QPOSCTL Register
15 14 13 12 11 10 9 8
PCSHDW PCLOAD PCPOL PCE PCSPW
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
7 6 5 4 3 2 1 0
PCSPW
R/W-0h
Table 6-20. QPOSCTL Register Field Descriptions
Bit Field Type Reset Description
15 PCSHDW R/W 0h
Position compare of shadow enable
Reset type: SYSRSn
0h (R/W) = Shadow disabled, load Immediate
1h (R/W) = Shadow enabled
14 PCLOAD R/W 0h
Position compare of shadow load
Reset type: SYSRSn
0h (R/W) = Load on QPOSCNT = 0
1h (R/W) = Load when QPOSCNT = QPOSCMP
13 PCPOL R/W 0h
Polarity of sync output
Reset type: SYSRSn
0h (R/W) = Active HIGH pulse output
1h (R/W) = Active LOW pulse output
12 PCE R/W 0h
Position compare enable/disable
Reset type: SYSRSn
0h (R/W) = Disable position compare unit
1h (R/W) = Enable position compare unit
11-0 PCSPW R/W 0h
Select-position-compare sync output pulse width
Reset type: SYSRSn
0h (R/W) = 1 * 4 * SYSCLKOUT cycles
1h (R/W) = 2 * 4 * SYSCLKOUT cycles
FFFh (R/W) = 4096 * 4 * SYSCLKOUT cycles
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