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Texas Instruments TMS320 2833 Series

Texas Instruments TMS320 2833 Series
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eQEP Registers
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SPRUI07March 2020
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Copyright © 2020, Texas Instruments Incorporated
Enhanced Quadrature Encoder Pulse (eQEP)
6.10.2.4 QPOSCMP Register (Offset = 6h) [reset = 0h]
QPOSCMP is shown in Figure 6-24 and described in Table 6-9.
Return to the Summary Table.
Position Compare
Figure 6-24. QPOSCMP Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
QPOSCMP
R/W-0h
Table 6-9. QPOSCMP Register Field Descriptions
Bit Field Type Reset Description
31-0 QPOSCMP R/W 0h
Position Compare
The position-compare value in this register is compared with the
position counter (QPOSCNT) to generate sync output and/or
interrupt on compare match.
Reset type: SYSRSn

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