www.ti.com
30
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
List of Tables
6-24. QFRC Register Field Descriptions ..................................................................................... 437
6-25. QEPSTS Register Field Descriptions .................................................................................. 439
6-26. QCTMR Register Field Descriptions ................................................................................... 441
6-27. QCPRD Register Field Descriptions ................................................................................... 442
6-28. QCTMRLAT Register Field Descriptions .............................................................................. 443
6-29. QCPRDLAT Register Field Descriptions .............................................................................. 444
7-1. Clock Chain to the ADC.................................................................................................. 449
7-2. Estimated Droop Error from n
τ
Value .................................................................................. 453
7-3. Power Options............................................................................................................. 456
7-4. Input Triggers.............................................................................................................. 461
7-5. Comparison of Single and Cascaded Operating Modes ............................................................ 465
7-6. Values for ADCCHSELSEQn Registers (MAX_CONV1 Set to 6).................................................. 470
7-7. Values for ADCCHSELSEQn (MAX_CONV1 set to 2) .............................................................. 473
7-8. Values After Second Autoconversion Session........................................................................ 473
7-9. ADC Registers ............................................................................................................ 477
7-10. ADCTRL1 Register Field Descriptions................................................................................. 478
7-11. ADCTRL2 Register Field Descriptions................................................................................. 480
7-12. ADCMAXCONV Register Field Descriptions.......................................................................... 483
7-13. Bit Selections for MAX_CONV1 for Various Number of Conversions ............................................ 483
7-14. ADCCHSELSEQ1 Register Field Descriptions ....................................................................... 485
7-15. ADCCHSELSEQ2 Register Field Descriptions ....................................................................... 486
7-16. ADCCHSELSEQ3 Register Field Descriptions ....................................................................... 487
7-17. CONVnn Bit Values and the ADC Input Channels Selected ....................................................... 487
7-18. ADCCHSELSEQ4 Register Field Descriptions ....................................................................... 488
7-19. ADCASEQSR Register Field Descriptions ............................................................................ 489
7-20. State of Active Sequencer .............................................................................................. 489
7-21. ADCRESULT_0 to ADCRESULT_15 Register Field Descriptions ................................................. 490
7-22. ADCTRL3 Register Field Descriptions................................................................................. 491
7-23. ADCST Register Field Descriptions.................................................................................... 492
7-24. ADCREFSEL Register Field Descriptions............................................................................. 493
7-25. ADCOFFTRIM Register Field Descriptions ........................................................................... 494
8-1. Peripheral Interrupt Trigger Source Options .......................................................................... 499
8-2. DMA Register Summary ................................................................................................ 510
8-3. DMACTRL Register Field Descriptions ................................................................................ 515
8-4. DEBUGCTRL Register Field Descriptions ............................................................................ 516
8-5. REVISION Register Field Descriptions ................................................................................ 517
8-6. PRIORITYCTRL1 Register Field Descriptions........................................................................ 518
8-7. PRIORITYSTAT Register Field Descriptions ......................................................................... 519
8-8. MODE Register Field Descriptions ..................................................................................... 520
8-9. PREINTSEL Values ...................................................................................................... 521
8-10. CONTROL Register Field Descriptions................................................................................ 523
8-11. BURST_SIZE Register Field Descriptions ............................................................................ 526
8-12. BURST_COUNT Register Field Descriptions......................................................................... 527
8-13. SRC_BURST_STEP Register Field Descriptions .................................................................... 528
8-14. DST_BURST_STEP Register Field Descriptions..................................................................... 529
8-15. TRANSFER_SIZE Register Field Descriptions ....................................................................... 530
8-16. TRANSFER_COUNT Register Field Descriptions ................................................................... 531
8-17. SRC_TRANSFER_STEP Register Field Descriptions............................................................... 532
8-18. DST_TRANSFER_STEP Register Field Descriptions ............................................................... 533
To Next Page
Loading...
Need help?
General
