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Texas Instruments TMS320 2833 Series User Manual

Texas Instruments TMS320 2833 Series
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Capture Mode Description
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SPRUI07March 2020
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Copyright © 2020, Texas Instruments Incorporated
Enhanced Capture (eCAP)
One of these events can be selected as the interrupt source (from the eCAPx module) going to the
PIE.
Seven interrupt events (CEVT1, CEVT2, CEVT3, CEVT4, CNTOVF, CTR=PRD, CTR=CMP) can be
generated. The interrupt enable register (ECEINT) is used to enable/disable individual interrupt event
sources. The interrupt flag register (ECFLG) indicates if any interrupt event has been latched and
contains the global interrupt flag bit (INT). An interrupt pulse is generated to the PIE only if any of the
interrupt events are enabled, the flag bit is 1, and the INT flag bit is 0. The interrupt service routine
must clear the global interrupt flag bit and the serviced event via the interrupt clear register (ECCLR)
before any other interrupt pulses are generated. You can force an interrupt event via the interrupt force
register (ECFRC). This is useful for test purposes.
Note: The CEVT1, CEVT2, CEVT3, CEVT4 flags are only active in capture mode (ECCTL2[CAP/APWM
== 0]). The CTR=PRD, CTR=CMP flags are only valid in APWM mode (ECCTL2[CAP/APWM == 1]).
CNTOVF flag is valid in both modes.

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Texas Instruments TMS320 2833 Series Specifications

General IconGeneral
BrandTexas Instruments
ModelTMS320 2833 Series
CategoryController
LanguageEnglish

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