#%325 =
:
52.4JO ® 30/*V
;
F 1 = 0.6 \ 6
P
O+D
= 9.7 ® 5.4JO = 52.4JO
G = ln F
2
12
.5$
0.25 .5$
G= 9.7
ì = 34003 ® 1.6L( = 5.4JO
ADC Circuit
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Analog-to-Digital Converter (ADC)
So the S+H time should be set to at least:
Finally, the minimum ACQPS value is calculated and rounded up to the nearest supported value:
While this gives a rough estimate of the required acquisition window, a better method would be to setup a
circuit with the ADC input model, a model of the source impedance/capacitance, and any board parasitics
in SPICE (or similar software) and simulate to verify that the sampling capacitor settles to the desired
accuracy.
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