SCI Registers
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SPRUI07–March 2020
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Serial Communications Interface (SCI)
Table 10-7. SCICCR Register Field Descriptions (continued)
Bit Field Type Reset Description
3 ADDRIDLE_MODE R/W 0h
SCI multiprocessor mode control bit.
This bit selects one of the multiprocessor protocols.Multiprocessor
communication is different from the other communication modes
because it uses SLEEP and TXWAKE functions (bits SCICTL1, bit 2
and SCICTL1, bit 3, respectively). The idle-line mode is usually used
for normal communications because the address-bit mode
adds an extra bit to the frame. The idle-line mode does not add this
extra bit and is compatible with RS-232 type communications.
Reset type: SYSRSn
0h (R/W) = Idle-line mode protocol selected
1h (R/W) = Address-bit mode protocol selected
2-0 SCICHAR R/W 0h
Character-length control bits 2-0.
These bits select the SCI character length from one to eight bits.
Characters of less than eight bits are right-justified in SCIRXBUF
and SCIRXEMU and are padded with leading zeros in SCIRXBUF.
SCITXBUF doesn't need to be padded with leading zeros.
Reset type: SYSRSn
0h (R/W) = SCICHAR_LENGTH_1
1h (R/W) = SCICHAR_LENGTH_2
2h (R/W) = SCICHAR_LENGTH_3
3h (R/W) = SCICHAR_LENGTH_4
4h (R/W) = SCICHAR_LENGTH_5
5h (R/W) = SCICHAR_LENGTH_6
6h (R/W) = SCICHAR_LENGTH_7
7h (R/W) = SCICHAR_LENGTH_8
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