Texas Instruments TMS320 2833 Series

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63
SPRUI07–March 2020
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System Control and Interrupts
Table 1-16. Peripheral Clock Control 1 Register (PCLKCR1) Field Descriptions (continued)
Bits Field Value Description
(1)
2 EPWM3ENCLK ePWM3 clock enable.
(3)
0 The ePWM3 module is not clocked. (default)
(2)
1 The ePWM3 module is clocked by the system clock (SYSCLKOUT).
1 EPWM2ENCLK ePWM2 clock enable.
(3)
0 The ePWM2 module is not clocked. (default)
(2)
1 The ePWM2 module is clocked by the system clock (SYSCLKOUT).
0 EPWM1ENCLK ePWM1 clock enable.
(3)
0 The ePWM1 module is not clocked. (default)
(2)
1 The ePWM1 module is clocked by the system clock (SYSCLKOUT).