eCAN Controller Overview
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SPRUI07–March 2020
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Controller Area Network (CAN)
13.4 eCAN Controller Overview
The eCAN has an internal 32-bit architecture.
The eCAN module consists of:
• The CAN protocol kernel (CPK)
• The message controller comprising:
– The memory management unit (MMU), including the CPU interface and the receive control unit
(acceptance filtering), and the timer management unit
– Mailbox RAM enabling the storage of 32 messages
– Control and status registers
After the reception of a valid message by the CPK, the receive control unit of the message controller
determines if the received message must be stored into one of the 32 message objects of the mailbox
RAM. The receive control unit checks the state, the identifier, and the mask of all message objects to
determine the appropriate mailbox location. The received message is stored into the first mailbox passing
the acceptance filtering. If the receive control unit could not find any mailbox to store the received
message, the message is discarded.
A message is composed of an 11- or 29-bit identifier, a control field, and up to 8 bytes of data.
When a message must be transmitted, the message controller transfers the message into the transmit
buffer of the CPK in order to start the message transmission at the next bus-idle state. When more than
one message must be transmitted, the message with the highest priority that is ready to be transmitted is
transferred into the CPK by the message controller. If two mailboxes have the same priority, then the
mailbox with the higher number is transmitted first.
The timer management unit comprises a time-stamp counter and apposes a time stamp to all messages
received or transmitted. It generates an interrupt when a message has not been received or transmitted
during an allowed period of time (time-out). The time-stamping feature is available in eCAN mode only.
To initiate a data transfer, the transmission request bit (TRS.n) must be set. The entire transmission
procedure and possible error handling are then performed without any CPU involvement. If a mailbox has
been configured to receive messages, the CPU easily reads its data registers using CPU read
instructions. The mailbox may be configured to interrupt the CPU after every successful message
transmission or reception.
13.4.1 Standard CAN Controller (SCC) Mode
The SCC Mode is a reduced functionality mode of the eCAN. Only 16 mailboxes (0 through 15) are
available in this mode. The time stamping feature is not available and the number of acceptance masks
available is reduced. This mode is selected by default. The SCC mode or the full featured eCAN mode is
selected using the SCB bit (CANMC.13).
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