General-Purpose Input/Output (GPIO)
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SPRUI07–March 2020
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System Control and Interrupts
1.4 General-Purpose Input/Output (GPIO)
The GPIO multiplexing (MUX) registers are used to select the operation of shared pins. The pins are
named by their general purpose I/O name (GPIO0 - GPIO87). These pins can be individually selected to
operate as digital I/O, referred to as GPIO, or connected to one of up to three peripheral I/O signals (via
the GPxMUXn registers). If selected for digital I/O mode, registers are provided to configure the pin
direction (via the GPxDIR registers). You can also qualify the input signals to remove unwanted noise (via
the GPxQSELn, GPACTRL, and GPBCTRL registers).
1.4.1 GPIO Module Overview
Up to three independent peripheral signals are multiplexed on a single GPIO-enabled pin in addition to
individual pin bit-I/O capability. There are three 32-bit I/O ports. Port A consists of GPIO0-GPIO31, port B
consists of GPIO32-GPIO63, and port C consists of GPIO64-87. Figure 1-40 shows the basic modes of
operation for the GPIO module.
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