38
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
System Control and Interrupts
Chapter 1
SPRUI07–March 2020
System Control and Interrupts
This chapter describes how various system controls and interrupts work and provides information on the:
• Flash and one-time programmable (OTP) memories
• Code security module (CSM), which is a security feature.
• Clocking mechanisms including the oscillator, PLL, XCLKOUT, watchdog module, and the low-power
modes. In addition, the 32-bit CPU-Timers are also described.
• GPIO multiplexing (MUX) registers used to select the operation of shared pins on the device.
• Accessing the peripheral frames to write to and read from various peripheral registers on the device.
• Interrupt sources both external and the peripheral interrupt expansion (PIE) block that multiplexes
numerous interrupt sources into a smaller set of interrupt inputs.
For more information on the Viterbi, Complex Math, CRC Unit (VCU), please refer to TMS320C28x
Extended Instruction Sets Technical Reference Manual.
Topic ........................................................................................................................... Page
1.1 Flash and OTP Memory Blocks............................................................................ 39
1.2 Code Security Module (CSM) ............................................................................... 49
1.3 Clocking and System Control .............................................................................. 59
1.4 General-Purpose Input/Output (GPIO)................................................................... 86
1.5 Peripheral Frames ............................................................................................ 129
1.6 Peripheral Interrupt Expansion (PIE)................................................................... 138
To Next Page
Loading...
Need help?
General
