Register Descriptions
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SPRUI07–March 2020
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Direct Memory Access (DMA) Module
Table 8-2. DMA Register Summary
(1)
(continued)
Offset Acronym Register Name Section
1493h SRC_BURST_STEP_5 Source Burst Step Size Register Section 8.9.10
1494h DST_BURST_STEP_5 Destination Burst Step Size Register Section 8.9.11
1495h TRANSFER_SIZE_5 Transfer Size Register Section 8.9.12
1496h TRANSFER_COUNT_5 Transfer Count Register Section 8.9.13
1497h SRC_TRANSFER_STEP_5 Source Transfer Step Size Register Section 8.9.14
1498h DST_TRANSFER_STEP_5 Destination Transfer Step Size Register Section 8.9.15
1499h SRC_WRAP_SIZE_5 Source Wrap Size Register Section 8.9.16
149Ah SRC_WRAP_COUNT_5 Source Wrap Count Register Section 8.9.17
149Bh SRC_WRAP_STEP_5 Source Wrap Step Size Register Section 8.9.18
149Ch DST_WRAP_SIZE_5 Destination Wrap Size Register Section 8.9.19
149Dh DST_WRAP_COUNT_5 Destination Wrap Count Register Section 8.9.20
149Eh DST_WRAP_STEP_5 Destination Wrap Step Size Register Section 8.9.21
149Fh SRC_BEG_ADDR_SHADOW_5 Shadow Source Begin and Current Address Pointer
Registers
Section 8.9.22
14A1h SRC_ADDR_SHADOW_5 Shadow Destination Begin and Current Address Pointer
Registers
Section 8.9.23
14A3h SRC_BEG_ADDR_5 Active Source Begin and Current Address Pointer
Registers
Section 8.9.24
14A5h SRC_ADDR_5 Active Destination Begin and Current Address Pointer
Registers
Section 8.9.25
14A7h DST_BEG_ADDR_SHADOW_5 Shadow Destination Begin and Current Address Pointer
Registers
Section 8.9.26
14A9h DST_ADDR_SHADOW_5 Shadow Destination Begin and Current Address Pointer
Registers
Section 8.9.27
14ABh DST_BEG_ADDR_5 Active Destination Begin and Current Address Pointer
Registers
Section 8.9.28
14ADh DST_ADDR_5 Active Destination Begin and Current Address Pointer
Registers
Section 8.9.29
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