www.ti.com
Special Case: External Device is the Transmit Frame Master
745
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Multichannel Buffered Serial Port (McBSP)
wait for two CLKR or CLKX cycles. If the McBSP generates the bit clock as a clock master, wait for
two CLKG cycles. The unexpected frame sync error (XSYNCERR), if any, occurs within this time
period.
c. Disable the transmitter (XRST = 0). This clears any outstanding XSYNCERR.
7. Setup data acquisition as required:
a. If the DMA controller is used to service the McBSP, setup data acquisition as desired and start the
DMA controller in this step, before the McBSP is taken out of reset.
b. If CPU interrupt is used to service the McBSP, no action is required in this step.
c. If CPU polling is used to service the McBSP, no action is required in this step.
8. Enable the XINT interrupt by setting the corresponding bit in the interrupt enable register (IER). In this
step, the McBSP transmitter is still in reset. Upon detection of the first transmit frame sync from the
external device, the McBSP generates an interrupt to the CPU and the DSP enters the interrupt
service routine (ISR). The ISR needs to perform these tasks in this order:
a. Modify the XINTM bits to the value desired for normal McBSP operations. If CPU interrupt is used
to service the McBSP in normal operations, ensure that the XINTM bits are modified to 0 to detect
the McBSP XRDY event. If no McBSP interrupt is desired in normal operations, disable future
McBSP-to-CPU interrupt in the interrupt enable register (IER).
b. Set the XRST bit and/or the RRST bit to 1 to enable the respective portion of the McBSP. The
McBSP is now ready to transmit and/or receive.
9. Service the McBSP:
a. If CPU polling is used to service the McBSP in normal operations, it can do so upon exit from the
ISR.
b. If CPU interrupt is used to service the McBSP in normal operations, upon XRDY interrupt service
routine is entered. The ISR should be setup to verify that XRDY = 1 and service the McBSP
accordingly.
c. If DMA controller is used to service the McBSP in normal operations, it services the McBSP
automatically upon receiving the XEVT and/or REVT.
10. Upon detection of the second frame sync, DXR is already serviced and the transmitter is ready to
transmit the valid data. The receiver is also serviced properly by the DSP.
To Next Page
Loading...
Need help?
General
