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Texas Instruments TMS320 2833 Series User Manual

Texas Instruments TMS320 2833 Series
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14
SPRUI07March 2020
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Copyright © 2020, Texas Instruments Incorporated
List of Figures
2-2. Vector Table Map......................................................................................................... 170
2-3. Bootloader Flow Diagram................................................................................................ 172
2-4. Boot ROM Stack .......................................................................................................... 174
2-5. Boot ROM Function Overview .......................................................................................... 176
2-6. Jump-to-Flash Flow Diagram............................................................................................ 177
2-7. Flow Diagram of Jump to M0 SARAM ................................................................................. 177
2-8. Flow Diagram of Jump-to-OTP Memory............................................................................... 177
2-9. Flow Diagram of Jump to XINTF x16 .................................................................................. 178
2-10. Flow Diagram of Jump to XINTF x32 .................................................................................. 178
2-11. Bootloader Basic Transfer Procedure ................................................................................. 183
2-12. Overview of InitBoot Assembly Function .............................................................................. 184
2-13. Overview of the SelectBootMode Function ........................................................................... 185
2-14. Overview of CopyData Function ....................................................................................... 187
2-15. Overview of SCI Bootloader Operation ................................................................................ 189
2-16. Overview of SCI_Boot Function ........................................................................................ 190
2-17. Overview of SCI_GetWordData Function ............................................................................. 191
2-18. Overview of Parallel GPIO Bootloader Operation .................................................................... 191
2-19. Parallel GPIO Boot Loader Handshake Protocol ..................................................................... 193
2-20. Parallel GPIO Mode Overview .......................................................................................... 193
2-21. Parallel GPIO Mode - Host Transfer Flow............................................................................. 194
2-22. 16-Bit Parallel GetWord Function....................................................................................... 195
2-23. 8-Bit Parallel GetWord Function ........................................................................................ 196
2-24. Overview of the Parallel XINTF Boot Loader Operation............................................................. 197
2-25. XINTF_Parallel Boot Loader Handshake Protocol ................................................................... 199
2-26. XINTF Parallel Mode Overview ......................................................................................... 200
2-27. XINTF Parallel Mode - Host Transfer Flow............................................................................ 201
2-28. 16-Bit Parallel GetWord Function....................................................................................... 202
2-29. 8-Bit Parallel GetWord Function ........................................................................................ 203
2-30. SPI Loader................................................................................................................. 204
2-31. Data Transfer From EEPROM Flow.................................................................................... 206
2-32. Overview of SPIA_GetWordData Function............................................................................ 206
2-33. EEPROM Device at Address 0x50 ..................................................................................... 207
2-34. Overview of I2C_Boot Function ........................................................................................ 208
2-35. Random Read............................................................................................................. 209
2-36. Sequential Read .......................................................................................................... 209
2-37. Overview of eCAN-A Bootloader Operation........................................................................... 210
2-38. ExitBoot Procedure Flow ................................................................................................ 212
3-1. Multiple ePWM Modules ................................................................................................. 220
3-2. Submodules and Signal Connections for an ePWM Module........................................................ 221
3-3. ePWM Submodules and Critical Internal Signal Interconnects..................................................... 222
3-4. Time-Base Submodule Block Diagram ................................................................................ 228
3-5. Time-Base Submodule Signals and Registers........................................................................ 229
3-6. Time-Base Frequency and Period...................................................................................... 231
3-7. Time-Base Counter Synchronization Scheme ........................................................................ 232
3-8. Time-Base Up-Count Mode Waveforms............................................................................... 234
3-9. Time-Base Down-Count Mode Waveforms ........................................................................... 235
3-10. Time-Base Up-Down-Count Waveforms, TBCTL[PHSDIR = 0] Count Down On Synchronization Event .... 235
3-11. Time-Base Up-Down Count Waveforms, TBCTL[PHSDIR = 1] Count Up On Synchronization Event........ 236
3-12. Counter-Compare Submodule .......................................................................................... 236

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Texas Instruments TMS320 2833 Series Specifications

General IconGeneral
BrandTexas Instruments
ModelTMS320 2833 Series
CategoryController
LanguageEnglish

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