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SPRUI07–March 2020
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Contents
11.5 Resetting or Disabling the I2C Module................................................................................. 631
11.6 I2C Registers.............................................................................................................. 632
11.6.1 I2C Base Addresses ........................................................................................... 632
11.6.2 I2C_REGS Registers........................................................................................... 633
12 Multichannel Buffered Serial Port (McBSP).......................................................................... 657
12.1 Overview ................................................................................................................... 658
12.1.1 Features of the McBSPs....................................................................................... 658
12.1.2 McBSP Pins/Signals............................................................................................ 659
12.2 Configuring Device Pins ................................................................................................. 660
12.3 McBSP Operation......................................................................................................... 660
12.3.1 Data Transfer Process of McBSPs........................................................................... 661
12.3.2 Companding (Compressing and Expanding) Data ......................................................... 662
12.3.3 Clocking and Framing Data ................................................................................... 663
12.3.4 Frame Phases................................................................................................... 666
12.3.5 McBSP Reception .............................................................................................. 668
12.3.6 McBSP Transmission .......................................................................................... 669
12.3.7 Interrupts and DMA Events Generated by a McBSP ...................................................... 670
12.4 McBSP Sample Rate Generator........................................................................................ 670
12.4.1 Block Diagram................................................................................................... 671
12.4.2 Frame Synchronization Generation in the Sample Rate Generator ..................................... 674
12.4.3 Synchronizing Sample Rate Generator Outputs to an External Clock .................................. 674
12.4.4 Reset and Initialization Procedure for the Sample Rate Generator...................................... 676
12.5 McBSP Exception/Error Conditions .................................................................................... 677
12.5.1 Types of Errors.................................................................................................. 677
12.5.2 Overrun in the Receiver........................................................................................ 677
12.5.3 Unexpected Receive Frame-Synchronization Pulse ....................................................... 679
12.5.4 Overwrite in the Transmitter................................................................................... 681
12.5.5 Underflow in the Transmitter .................................................................................. 682
12.5.6 Unexpected Transmit Frame-Synchronization Pulse ...................................................... 683
12.6 Multichannel Selection Modes .......................................................................................... 685
12.6.1 Channels, Blocks, and Partitions ............................................................................. 685
12.6.2 Multichannel Selection ......................................................................................... 686
12.6.3 Configuring a Frame for Multichannel Selection............................................................ 686
12.6.4 Using Two Partitions ........................................................................................... 686
12.6.5 Using Eight Partitions .......................................................................................... 688
12.6.6 Receive Multichannel Selection Mode ....................................................................... 689
12.6.7 Transmit Multichannel Selection Modes..................................................................... 689
12.6.8 Using Interrupts Between Block Transfers .................................................................. 691
12.7 SPI Operation Using the Clock Stop Mode............................................................................ 692
12.7.1 SPI Protocol ..................................................................................................... 692
12.7.2 Clock Stop Mode................................................................................................ 693
12.7.3 Enable and Configure the Clock Stop Mode ................................................................ 693
12.7.4 Clock Stop Mode Timing Diagrams .......................................................................... 694
12.7.5 Procedure for Configuring a McBSP for SPI Operation ................................................... 696
12.7.6 McBSP as the SPI Master..................................................................................... 696
12.7.7 McBSP as an SPI Slave ....................................................................................... 698
12.8 Receiver Configuration................................................................................................... 699
12.8.1 Programming the McBSP Registers for the Desired Receiver Operation............................... 699
12.8.2 Resetting and Enabling the Receiver ........................................................................ 700
12.8.3 Set the Receiver Pins to Operate as McBSP Pins......................................................... 700
12.8.4 Digital Loopback Mode......................................................................................... 701
12.8.5 Clock Stop Mode................................................................................................ 701
12.8.6 Receive Multichannel Selection Mode ....................................................................... 702
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