Texas Instruments TMS320 2833 Series User Manual

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9
SPRUI07–March 2020
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Contents
12.8.7 Receive Frame Phases ........................................................................................ 702
12.8.8 Receive Word Length(s) ....................................................................................... 703
12.8.9 Receive Frame Length......................................................................................... 703
12.8.10 Receive Frame-Synchronization Ignore Function......................................................... 704
12.8.11 Receive Companding Mode ................................................................................. 705
12.8.12 Receive Data Delay........................................................................................... 706
12.8.13 Receive Sign-Extension and Justification Mode .......................................................... 708
12.8.14 Receive Interrupt Mode....................................................................................... 709
12.8.15 Receive Frame-Synchronization Mode..................................................................... 709
12.8.16 Receive Frame-Synchronization Polarity .................................................................. 711
12.8.17 Receive Clock Mode.......................................................................................... 713
12.8.18 Receive Clock Polarity........................................................................................ 714
12.8.19 SRG Clock Divide-Down Value ............................................................................. 716
12.8.20 SRG Clock Synchronization Mode.......................................................................... 716
12.8.21 SRG Clock Mode (Choose an Input Clock)................................................................ 717
12.8.22 SRG Input Clock Polarity..................................................................................... 718
12.9 Transmitter Configuration................................................................................................ 718
12.9.1 Programming the McBSP Registers for the Desired Transmitter Operation............................ 718
12.9.2 Resetting and Enabling the Transmitter ..................................................................... 719
12.9.3 Set the Transmitter Pins to Operate as McBSP Pins...................................................... 720
12.9.4 Digital Loopback Mode......................................................................................... 720
12.9.5 Clock Stop Mode................................................................................................ 720
12.9.6 Transmit Multichannel Selection Mode ...................................................................... 721
12.9.7 XCERs Used in the Transmit Multichannel Selection Mode .............................................. 722
12.9.8 Transmit Frame Phases ....................................................................................... 725
12.9.9 Transmit Word Length(s) ...................................................................................... 725
12.9.10 Transmit Frame Length....................................................................................... 726
12.9.11 Enable/Disable the Transmit Frame-Synchronization Ignore Function ................................ 727
12.9.12 Transmit Companding Mode................................................................................. 728
12.9.13 Transmit Data Delay .......................................................................................... 729
12.9.14 Transmit DXENA Mode....................................................................................... 731
12.9.15 Transmit Interrupt Mode...................................................................................... 731
12.9.16 Transmit Frame-Synchronization Mode .................................................................... 732
12.9.17 Transmit Frame-Synchronization Polarity.................................................................. 733
12.9.18 SRG Frame-Synchronization Period and Pulse Width ................................................... 734
12.9.19 Transmit Clock Mode ......................................................................................... 735
12.9.20 Transmit Clock Polarity....................................................................................... 735
12.10 Emulation and Reset Considerations.................................................................................. 736
12.10.1 McBSP Emulation Mode ..................................................................................... 737
12.10.2 Resetting and Initializing McBSPs .......................................................................... 737
12.11 Data Packing Examples ................................................................................................. 739
12.11.1 Data Packing Using Frame Length and Word Length.................................................... 739
12.11.2 Data Packing Using Word Length and the Frame-Synchronization Ignore Function ................ 741
12.12 Interrupt Generation...................................................................................................... 741
12.12.1 McBSP Receive Interrupt Generation ...................................................................... 742
12.12.2 McBSP Transmit Interrupt Generation ..................................................................... 742
12.12.3 Error Flags .................................................................................................... 743
12.13 McBSP Modes ............................................................................................................ 743
12.14 Special Case: External Device is the Transmit Frame Master ..................................................... 744
12.15 McBSP Registers ........................................................................................................ 746
12.15.1 McBSP Base Addresses ..................................................................................... 746
12.15.2 Data Receive Registers (DRR[1,2])......................................................................... 747
12.15.3 Data Transmit Registers (DXR[1,2])........................................................................ 747

Texas Instruments TMS320 2833 Series Specifications

General

Brand	Texas Instruments
Model	TMS320 2833 Series
Category	Controller
Language	English