Texas Instruments TMS570LC4357 - Page 73

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73
SPNU563A–March 2018
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List of Tables
2-48. Die Identification Register, Upper Word (DIEIDH) Field Descriptions ............................................. 179
2-49. LPO/Clock Monitor Control Register (LPOMONCTL) Field Descriptions.......................................... 180
2-50. Clock Test Register (CLKTEST) Field Descriptions.................................................................. 183
2-51. DFT Control Register (DFTCTRLREG) Field Descriptions.......................................................... 185
2-52. DFT Control Register 2 (DFTCTRLREG2) Field Descriptions ..................................................... 186
2-53. General Purpose Register (GPREG1) Field Descriptions........................................................... 187
2-54. System Software Interrupt Request 1 Register (SSIR1) Field Descriptions ...................................... 188
2-55. System Software Interrupt Request 2 Register (SSIR2) Field Descriptions ...................................... 189
2-56. System Software Interrupt Request 3 Register (SSIR3) Field Descriptions ...................................... 190
2-57. System Software Interrupt Request 4 Register (SSIR4) Field Descriptions ...................................... 191
2-58. RAM Control Register (RAMGCR) Field Descriptions ............................................................... 192
2-59. Bus Matrix Module Control Register 1 (BMMCR) Field Descriptions .............................................. 193
2-60. CPU Reset Control Register (CPURSTGCR) Field Descriptions .................................................. 194
2-61. Clock Control Register (CLKCNTL) Field Descriptions.............................................................. 195
2-62. ECP Control Register (ECPCNTL) Field Descriptions............................................................... 196
2-63. DEV Parity Control Register 1 (DEVCR1) Field Descriptions ...................................................... 197
2-64. System Exception Control Register (SYSECR) Field Descriptions ................................................ 197
2-65. System Exception Status Register (SYSESR) Field Descriptions ................................................. 198
2-66. System Test Abort Status Register (SYSTASR) Field Descriptions .............................................. 200
2-67. Global Status Register (GLBSTAT) Field Descriptions.............................................................. 201
2-68. Device Identification Register (DEVID) Field Descriptions .......................................................... 202
2-69. Software Interrupt Vector Register (SSIVEC) Field Descriptions .................................................. 203
2-70. System Software Interrupt Flag Register (SSIF) Field Descriptions ............................................... 204
2-71. Secondary System Control Registers.................................................................................. 205
2-72. PLL Control Register 3 (PLLCTL3) Field Descriptions .............................................................. 206
2-73. CPU Logic BIST Clock Prescaler (STCLKDIV) Field Descriptions................................................. 207
2-74. ECP Control Register 1 (ECPCNTL1) Field Descriptions ........................................................... 208
2-75. Clock 2 Control Register (CLK2CNTRL) Field Descriptions ....................................................... 209
2-76. Peripheral Asynchronous Clock Configuration 1 Register (VCLKACON1) Field Descriptions ................ 210
2-77. HCLK Control Register (HCLKCNTL) Field Descriptions............................................................ 211
2-78. Clock Slip Control Register (CLKSLIP) Field Descriptions.......................................................... 212
2-79. Clock Slip Register (CLKSLIP) Field Descriptions ................................................................... 213
2-80. EFUSE Controller Control Register (EFC_CTLREG) Field Descriptions.......................................... 214
2-81. Die Identification Register, Lower Word (DIEIDL_REG0) Field Descriptions..................................... 214
2-82. Die Identification Register, Upper Word (DIEIDH_REG1) Field Descriptions .................................... 215
2-83. Die Identification Register, Lower Word (DIEIDL_REG2) Field Descriptions..................................... 215
2-84. Die Identification Register, Upper Word (DIEIDH_REG3) Field Descriptions .................................... 216
2-85. Peripheral Central Resource Control Registers ...................................................................... 217
2-86. Peripheral Memory Protection Set Register 0 (PMPROTSET0) Field Descriptions ............................. 223
2-87. Peripheral Memory Protection Set Register 1 (PMPROTSET1) Field Descriptions ............................. 223
2-88. Peripheral Memory Protection Clear Register 0 (PMPROTCLR0) Field Descriptions........................... 224
2-89. Peripheral Memory Protection Clear Register 1 (PMPROTCLR1) Field Descriptions........................... 224
2-90. Peripheral Protection Set Register 0 (PPROTSET0) Field Descriptions .......................................... 225
2-91. Peripheral Protection Set Register 1 (PPROTSET1) Field Descriptions .......................................... 226
2-92. Peripheral Protection Set Register 2 (PPROTSET2) Field Descriptions .......................................... 226
2-93. Peripheral Protection Set Register 3 (PPROTSET3) Field Descriptions .......................................... 227
2-94. Peripheral Protection Clear Register 0 (PPROTCLR0) Field Descriptions ....................................... 227
2-95. Peripheral Protection Clear Register 1 (PPROTCLR1) Field Descriptions ....................................... 228
2-96. Peripheral Protection Clear Register 2 (PPROTCLR2) Field Descriptions ....................................... 228