Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 84
BL funC ; Branch with link (Call) to function funC, return address
; stored in LR
BX LR ; Return from function call
BXNE R0 ; Conditionally branch to address stored in R0
BLX R0 ; Branch with link and exchange (Call) to a address stored
; in R0.
3.6.9.2 CBZ and CBNZ
Compare and Branch on Zero, Compare and Branch on Non-Zero.
3.6.9.2.1 Syntax
CBZ Rn, label
CBNZ Rn, label
where:
Rn is the register holding the operand.
label is the branch destination.
3.6.9.2.2 Operation
Use the
CBZ
or
CBNZ
instructions to avoid changing the condition code flags and to reduce the number of
instructions.
CBZ Rn, label
does not change condition flags but is otherwise equivalent to:
CMP Rn, #0
BEQ label
CBNZ Rn, label
does not change condition flags but is otherwise equivalent to:
CMP Rn, #0
BNE label
3.6.9.2.3 Restrictions
The restrictions are:
•
Rn
must be in the range of
R0
to
R7
• the branch destination must be within 4 to 130 bytes after the instruction
• these instructions must not be used inside an IT block.
3.6.9.2.4 Condition Flags
These instructions do not change the flags.
Examples
CBZ R5, target ; Forward branch if R5 is zero
CBNZ R0, target ; Forward branch if R0 is not zero.
3.6.9.3 IT
If-Then condition instruction.
3.6.9.3.1 Syntax
IT{x{y{z}}} cond
where:
x specifies the condition switch for the second instruction in the IT block.
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