Fabric Interface Interrupt Controller
UG0331 User Guide Revision 15.0 754
3 MDDR_IO_CALIB_INT_STATUS 0 Set if the interrupt source for MDDR_IO_CALIB_INT is
asserted and the MDDR_IO_CALIB_INT_ENBL
interrupt enable bit in INTERRUPT_ENABLE1 is High.
4 Reserved 0 Reserved
5 FAB_PLL_LOCK_INT_STATUS 0 Set if the interrupt source for FAB_PLL_LOCK_INT is
asserted and the FAB_PLL_LOCK_INT_ENBL interrupt
enable bit in INTERRUPT_ENABLE1 is High.
6 FAB_PLL_LOCKLOST_INT_STATUS 0 Set if the interrupt source for
FAB_PLL_LOCKLOST_INT is asserted and the
FAB_PLL_LOCKLOST_INT_ENBL interrupt enable bit
in INTERRUPT_ENABLE1 is High.
7 FIC64_INT_STATUS 0 Set if the interrupt source for FIC64_INT is asserted and
the FIC64_INT_ENBL interrupt enable bit in
INTERRUPT_ENABLE1 is High.
8-31 Reserved 0 Reserved
Table 775 • INTERRUPT_REASON0
Bit
Number Name
Reset
Value Description
0 SPIINT0_STATUS 0 Set if the interrupt source for SPIINT0 is asserted
and the SPIINT0_ENBL interrupt enable bit in
INTERRUPT_ENABLE0 is High.
1 SPIINT1_STATUS 0 Set if the interrupt source for SPIINT1 is asserted
and the SPIINT1_ENBL interrupt enable bit in
INTERRUPT_ENABLE0 is High.
2 I2C_INT0_STATUS 0 Set if the interrupt source for I2C_INT0 is
asserted and the I2C_INT0_ENBL interrupt
enable bit in INTERRUPT_ENABLE0 is High.
3 I2C_INT1_STATUS 0 Set if the interrupt source forI2C_INT1 is
asserted and the I2C_INT1_ENBL interrupt
enable bit in INTERRUPT_ENABLE0 is High.
4 MMUART0_INTR_STATUS 0 Set if the interrupt source for MMUART0_INTR is
asserted and the MMUART0_INTR_ENBL
interrupt enable bit in INTERRUPT_ENABLE0 is
High.
5 MMUART1_INTR_STATUS 0 Set if the interrupt source for MMUART1_INTR is
asserted and the MMUART1_INTR_ENBL
interrupt enable bit in INTERRUPT_ENABLE0 is
High.
6 MAC_INT_STATUS 0 Set if the interrupt source for MAC_INT is
asserted and the MAC_INT_ENBL interrupt
enable bit in INTERRUPT_ENABLE0 is High.
7 USB_MC_INT_STATUS 0 Set if the interrupt source for USB_MC_INT is
asserted and the USB_MC_INT_ENBL interrupt
enable bit in INTERRUPT_ENABLE0 is High.
8 PDMAINTERRUPT_STATUS 0 Set if the interrupt source for PDMAINTERRUPT
is asserted and the PDMAINTERRUPT_ENBL
interrupt enable bit in INTERRUPT_ENABLE0 is
High.
Table 774 • INTERRUPT_REASON1 (continued)
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