Microsemi SmartFusion2 - Table 137 EDAC_IRQ_ENABLE_CR

Embedded SRAM (eSRAM) Controllers
UG0331 User Guide Revision 15.0 208
8 MAC_EDAC_RX_1E_EN 0 Allows the 1-bit error EDAC for Ethernet Rx RAM status update to
be disabled. Allowed values:
0: MAC_EDAC_RX_1E_EN is disabled.
1: MAC_EDAC_RX_1E_EN is enabled.
7 MAC_EDAC_TX_2E_EN 0 Allows the 2-bit error EDAC for Ethernet Tx RAM status update to
be disabled. Allowed values:
0: MAC_EDAC_TX_2E_EN is disabled.
1: MAC_EDAC_TX_2E_EN is enabled.
6 MAC_EDAC_TX_1E_EN 0 Allows the 1-bit error EDAC for Ethernet Tx RAM status update to
be disabled. Allowed values:
0: MAC_EDAC_TX_1E_EN is disabled.
1: MAC_EDAC_TX_1E_EN is enabled.
5 Reserved 0 Reserved
4 Reserved 0 Reserved
3 ESRAM1_EDAC_2E_EN 0 Allows the 2-bit error EDAC for eSRAM1 status update to be
disabled. Allowed values:
0: ESRAM1_EDAC_2E_EN is disabled.
1: ESRAM1_EDAC_2E_EN is enabled.
2 ESRAM1_EDAC_1E_EN 0 Allows the 1-bit error EDAC for eSRAM1 status update to be
disabled. Allowed values:
0: ESRAM1_EDAC_1E_EN is disabled.
1: ESRAM1_EDAC_1E_EN is enabled.
1 ESRAM0_EDAC_2E_EN 0 Allows the 2-bit error EDAC for eSRAM0 status update to be
disabled. Allowed values:
0: ESRAM0_EDAC_2E_EN is disabled.
1: ESRAM0_EDAC_2E_EN is enabled.
0 ESRAM0_EDAC_1E_EN 0 Allows the 1-bit error EDAC for eSRAM0 status update to be
disabled. Allowed values:
0: ESRAM0_EDAC_1E_EN is disabled.
1: ESRAM0_EDAC_1E_EN is enabled.
Table 138 • EDAC_CR
Bit
Number Name
Reset
Value Description
[31:7] Reserved 0 Reserved.
6 CAN_EDAC_EN 0 Allows the EDAC for CAN to be disabled. Allowed values:
0: EDAC disabled
1: EDAC enabled
5 USB_EDAC_EN 0 Allows the EDAC for USB to be disabled. Allowed values:
0: EDAC disabled
1: EDAC enabled
4 MAC_EDAC_RX_EN 0 Allows the EDAC for Ethernet Rx RAM to be disabled. Allowed values:
0: Rx RAM EDAC disabled
1: Rx RAM EDAC enabled
Table 137 • EDAC_IRQ_ENABLE_CR (continued)
Bit
Number Name
Reset
Value Description