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Microsemi SmartFusion2 - Table 311 LPM_FADDR_REG (0 X40043365)

Microsemi SmartFusion2
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Universal Serial Bus OTG Controller
UG0331 User Guide Revision 15.0 369
10.3.14.8 LPM_FADDR_REG Bit Definitions
1 LPMNY 0 This bit is set when an LPM transaction is transmitted and the device responds with
a NYET.
0 LPMST 0 This bit is set when an LPM transaction is transmitted and the device responds with
a STALL.
Table 311 • LPM_FADDR_REG (0x40043365)
Bit
Number Name
Reset
Value Function
7 Reserved N/A
[6:0] LPMFADDR 0 The LPM function address
Table 310 • LPM_INTR_REG (0x40043364) (Host Mode) (continued)
Bit
Number Name
Reset
Value Function

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