Microsemi SmartFusion2 - Figure 23 ISER Register Bit Assignments; Table 41 CMSIS Access NVIC Functions

Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 95
3.7.1.2 Accessing the Cortex-M3 Processor NVIC Registers Using CMSIS
CMSIS functions enable software portability between different Cortex-M3 profile processors. To access
the NVIC registers when using CMSIS, use the following functions:
3.7.1.3 Interrupt Set-enable Registers
The NVIC_ISER0-NVIC_ISER7 registers enable interrupts, and show which interrupts are enabled. See
the register summary in Ta bl e 40 , page 95 for the register attributes.
The bit assignments are:
Figure 23 • ISER Register Bit Assignments
0XE000E180 -
0xE000E19C
NVIC_ICER0-
NVIC_ICER7
RW Privileged 0x00000000 Interrupt Clear-enable Registers, page 97
0XE000E200 -
0xE000E21C
NVIC_ISPR0-
NVIC_ISPR7
RW Privileged 0x00000000 Interrupt Set-pending Registers, page 97
0XE000E280 -
0xE000E29C
NVIC_ICPR0-
NVIC_ICPR7
RW Privileged 0x00000000 Interrupt Clear-Pending Registers, page 98
0xE000E300 -
0xE000E31C
NVIC_IABR0-
NVIC_IABR7
RO Privileged 0x00000000 Interrupt Active Bit Registers, page 98
0xE000E400 -
0xE000E4EF
NVIC_IPR0-
NVIC_IPR59
RW Privileged 0x00000000 Interrupt Priority Registers, page 99
0xE000EF00 STIR WO Configurable
1
0x00000000 Software Trigger Interrupt Register,
page 100
1. See the register description for more information.
Table 41 • CMSIS Access NVIC Functions
CMSIS Function Description
void NVIC_EnableIRQ(IRQn_Type IRQn)
1
1. The input parameter IRQn is the IRQ number, see Table 22 on page 34 for more information.
Enables an interrupt or exception.
void NVIC_DisableIRQ(IRQn_Type IRQn)
a
Disables an interrupt or exception.
void NVIC_SetPendingIRQ(IRQn_Type IRQn)
a
Sets the pending status of interrupt or exception to 1.
void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
a
Clears the pending status of interrupt or exception to 0.
uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
a
Reads the pending status of interrupt or exception.
This function returns non-zero value if the pending status
is set to 1.
void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
a
Sets the priority of an interrupt or exception with
configurable priority level to 1.
uint32_t NVIC_GetPriority(IRQn_Type IRQn)
a
Reads the priority of an interrupt or exception with
configurable priority level.
This function return the current priority level.
Table 40 • NVIC Register Summary (continued)
Address Name Type
Required
privilege
Reset
value See
SETENA bits
31 0