Microsemi SmartFusion2 - Figure 34 AIRCR Bit Assignments; Table 55 AIRCR Bit Assignments; Table 56 Priority Grouping

Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 106
The bit assignments are:
Figure 34 • AIRCR Bit Assignments
3.7.2.5.1 Binary Point
The PRIGROUP field indicates the position of the binary point that splits the PRI_n fields in the Interrupt
Priority Registers into separate group priority and subpriority fields. The following table shows how the
PRIGROUP value controls this split. <If you implement fewer than 8 priority bits you might require more
explanation here, and want to remove invalid rows from the table, and modify the entries in the number of
columns.>
Table 55 • AIRCR Bit Assignments
Bits Name Type Function
[31:16] Write:
VECTKEYSTAT
Read: VECTKEY
RW Register key:
Reads as
0xFA05 .
On writes, write 0x05FA to VECTKEY, otherwise the write is ignored.
[15] ENDIANNESS RO Data endianness bit:
0: Little-endian
1: Big-endian.
ENDIANNESS is set from the BIGEND configuration signal during reset.
[14:11] Reserved
[10:8] PRIGROUP R/W Interrupt priority grouping field. This field determines the split of group
priority from subpriority, see "Binary Point" on page 102.
[7:3] Reserved.
[2] SYSRESETREQ WO System reset request:
0: no system reset request
1: asserts a signal to the outer system that requests a reset.
This is intended to force a large system reset of all major components
except for debug.
This bit reads as 0.
[1] VECTCLRACTIVE WO Reserved for Debug use. This bit reads as 0. When writing to the register
you must write 0 to this bit, otherwise behavior is Unpredictable.
[0] VECTRESET WO Reserved for Debug use. This bit reads as 0. When writing to the register
you must write 0 to this bit, otherwise behavior is Unpredictable.
Table 56 • Priority Grouping
PRIGROUP
Interrupt priority level value, PRI_N[7:0] Number of
Binary point
1
Group priority bits Subpriority bits Group priorities Subpriorities
b000 bxxxxxxx.y [7:1] [0] 128 2
On read: VECTKEYSTAT
On write: VECTKEY
31 16 15 14 11 10 8 7 3 2 1 0
Reserved Reserved
ENDIANNESS PRIGROUP SYSRESETREQ
VECTCLRACTIVE
VECTRESET
Reserved for Debug use