Microsemi SmartFusion2 - Software Interrupt Register

System Register Block
UG0331 User Guide Revision 15.0 693
22.3.19 Software Interrupt Register
22.3.20 Software Reset Control Register
Table 673 • SOFT_IRQ_CR
Bit
Number Name
Reset
Value Description
[31:1] Reserved 0
0 SOFTINTERRUPT 0 1: FIIC SOFTINTERRUPT is asserted
0: SOFTINTERRUPT signal is cleared
Table 674 • SOFT_RESET_CR
Bit
Number Name
Reset
Value Description
[31:27] Reserved 0
26 MDDR_DDRFIC_SOFTRESET 0x1 0: Releases DDR_FIC controller from reset
1: Keeps DDR_FIC controller in reset
25 MDDR_CTLR_SOFTRESET 0x1 0: Releases MDDR controller from reset
1: Keeps MMDR controller in reset
24 MSS_GPOUT_31_24_SOFTRESET 0x1 0: Releases GPIO_OUT[31:24] from reset
1: Keeps GPIO_OUT[31:24] in reset
23 MSS_GPOUT_23_16_SOFTRESET 0x1 0: Releases GPIO_OUT[23:16] from reset
1: Keeps GPIO_OUT[23:16] in reset
22 MSS_GPOUT_15_8_SOFTRESET 0x1 0: Releases GPIO_OUT[15:8] from reset
1: Keeps GPIO_OUT[15:8] in reset
21 MSS_GPOUT_7_0_SOFTRESET 0x1 0: Releases GPIO_OUT[7:0] from reset
1: Keeps GPIO_OUT[7:0] in reset
20 MSS_GPIO_SOFTRESET 0x1 0: Releases the GPIO from reset, as long as it isn’t
being held in reset by some other means
1: Keeps the GPIO to be held in reset
Asserting this soft reset bit holds APB register, GPIO
input, and interrupt generation logic. This reset does
not affect the GPIO OUT logic
19 FIC_1_SOFTRESET 0x1 0: Releases FIC _1 from reset
1: Keeps FIC_1 in reset
18 FIC_0_SOFTRESET 0x1 0: Releases FIC _0from reset
1: Keeps FIC_0 in reset
17 HPDMA_SOFTRESET 0x1 0: Releases HPDMA from reset
1: Keeps HPDMA n reset
16 FPGA_SOFTRESET 0x1 0: Releases FPGA from reset
1: Keeps FPGA in reset
15 COMBLK_SOFTRESET 0 0: Releases COMM_BLK from reset
1: Keeps COMMUNICATION BLOCK (COMM_BLK) in
reset
14 USB_SOFTRESET 0x1 0: Releases USB from reset
1: Keeps USB in reset