Microsemi SmartFusion2 - Nak_Limit0_Reg; Tx_Interval_Reg; Table 230 TX_TYPE_REG

Universal Serial Bus OTG Controller
UG0331 User Guide Revision 15.0 328
10.3.6.19 TX_TYPE_REG Bit Definitions
10.3.6.20 NAK_LIMIT0_REG (Hots mode only) Bit Definitions
10.3.6.21 TX_INTERVAL_REG (Host mode only) Bit Definitions
Table 230 • TX_TYPE_REG
Bit
Number Name
Reset
Value Function
[7:6] Speed 0 Operating speed of the target device
00: Unused (If selected, the target is assumed to be using the same
connection speed as the USB controller.)
01: High
10: Full
11: Low
When the core is not configured with the multipoint option, these bits should
not be accessed.
[5:4] Protocol 0 The Cortex-M3 processor (or fabric master) should set this to select the
required protocol for the transmit endpoint.
00: Control
01: ISO
10: Bulk
11: Interrupt
[3:0] Target Endpoint
Number
0 The Cortex-M3 processor (or fabric master) should set this value to the
endpoint number contained in the transmit endpoint descriptor returned to
the USB controller during device enumeration.
Table 231 • NAK_LIMIT0_REG
Bit
Number Name
Reset
Value Function
[4:0] Endpoint0 NAK Limit
(m)
0 Sets the number of frames/microframes (high speed transfers) after which
endpoint 0 should timeout on receiving a stream of NAK responses.
Equivalent settings for other endpoints can be made through their
TX_INTERVAL_REG and TX_INTERVAL_REG registers.
The number of frames/microframes selected is 2(m – 1) (where m is the
value set in the register, valid values are 2 – 16). If the host receives NAK
responses from the target for more frames than the number represented
by the limit set in this register, the endpoint will be halted.
A value of 0 or 1 disables the NAK timeout function.
Table 232 • TX_INTERVAL_REG
Bit
Number Name
Reset
Value Function
[7:0] Tx Polling
Interval/NAK Limit
(m)
0 Defines the polling interval for the currently selected transmit endpoint for
interrupt and ISO transfers. For bulk endpoints, this register sets the
number of frames/microframes after which the endpoint should timeout on
receiving a stream of NAK responses.
There is one such register for each configured transmit endpoint (except
endpoint 0). In each case the value that is set defines a number of
frames/microframes (high speed transfers), as given in Table 233,
page 329.