Microsemi SmartFusion2 - Table 255 ULPI_IRQ_MASK_REG (0 X40043072); Table 256 ULPI_IRQ_SRC_REG (0 X40043073); Table 257 ULPI_DATA_REG (0 X40043074); Table 258 ULPI_ADDR_REG (0 X40043075)

Universal Serial Bus OTG Controller
UG0331 User Guide Revision 15.0 339
10.3.9.3 ULPI_IRQ_MASK_REG Bit Definitions
10.3.9.4 ULPI_IRQ_SRC_REG Bit Definitions
10.3.9.5 ULPI_DATA_REG Bit Definitions
10.3.9.6 ULPI_ADDR_REG Bit Definitions
Table 255 • ULPI_IRQ_MASK_REG (0x40043072)
Bit
Number Name
Reset
Value Function
[7:4] Reserved N/A
3 RxCmdIntEn 0 Assert MC_NINT if RxCmdInt (ULPI_IRQ_SRC_REG.bit3) is set.
To clear MC_NINT, the software must clear RxCmdEvent
(ULPI_CARKIT_CTRL_REG. bit4).
2 ActiveEndIntEn 0 Assert MC_NINT if ActiveEndInt (ULPI_IRQ_SRC_REG.bit2) is set.
To clear MC_NINT, the software must clear CarKitActiveEnd
(ULPI_CARKIT_CTRL_REG.bit5).
1 AltIntEn 0 Assert MC_NINT if AltInt (ULPI_IRQ_SRC_REG.bit1) is set.
To clear MC_NINT, the software must clear AltIntEvent
(ULPI_CARKIT_CTRL_REG.bit2).
0 RegIntEn 0 Assert MC_NINT if RegInt (ULPI_IRQ_SRC_REG.bit0) is set.
To clear MC_NINT, the software must clear ULPIRegCmplt
(ULPI_REG_CTRL.bit1).
Table 256 • ULPI_IRQ_SRC_REG (0x40043073)
Bit
Number Name
Reset
Value Function
[7:4] Reserved N/A
3 RxCmdInt 0 Asserted if RxCmdEvent (ULPI_CARKIT_CTRL_REG.bit4) is set.
To clear the interrupt, the software must clear RxCmdEvent.
2 ActiveEndInt 0 Asserted if CarKitActiveEnd (ULPI_CARKIT_CTRL_REG.bit5) is set.
To clear the interrupt, the software must clear CarKitActiveEnd.
1 AltInt 0 Asserted if AltIntEvent (ULPI_CARKIT_CTRL_REG.bit2) is set.
To clear the interrupt, the software must clear AltIntEvent.
0 RegInt 0 Asserted if ULPIRegCmplt (ULPI_REG_CTRL.bit1) is set.
To clear the interrupt, the software must clear ULPIRegCmplt.
Table 257 • ULPI_DATA_REG (0x40043074)
Bit
Number Name
Reset
Value Function
[7:0] ULPIRegData 0 Register data for PHY register access
Table 258 • ULPI_ADDR_REG (0x40043075)
Bit
Number Name
Reset
Value Function
[7:0] ULPIRegAddr 0 Address for PHY register access