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Microsemi SmartFusion2 - Table 136 CLR_EDAC_COUNTERS

Microsemi SmartFusion2
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Embedded SRAM (eSRAM) Controllers
UG0331 User Guide Revision 15.0 207
3 ESRAM1_EDAC_CNTCLR_2E 0 Generated to clear the 16-bit counter value in ESRAM1
corresponding to the count value of EDAC 2-bit errors. This in
turn clears the upper 16 bits of the ESRAM1_EDAC_CNT
register.
2 ESRAM1_EDAC_CNTCLR_1E 0 Generated to clear the 16-bit counter value in eSRAM1
corresponding to count value of EDAC 1-bit errors. This in turn
clears the lower 16 bits of the ESRAM1_EDAC_CNT register.
1 ESRAM0_EDAC_CNTCLR_2E 0 Generated to clear the 16-bit counter value in ESRAM0
corresponding to count value of EDAC 2bit Errors. This in turn
clears the upper 16 bits of the ESRAM0_EDAC_CNT register.
0 ESRAM0_EDAC_CNTCLR_1E 0 Generated to clear the 16-bit counter value in ESRAM0
corresponding to the count value of EDAC 1-bit errors. This in
turn clears the lower 16 bits of the ESRAM0_EDAC_CNT
register.
Table 137 • EDAC_IRQ_ENABLE_CR
Bit
Number Name
Reset
Value Description
[31:15] Reserved 0 Reserved
14 MDDR_ECC_INT_EN 0 Allows the error EDAC for MDDR status update to be disabled.
Allowed values:
0: MDDR_EDAC_2E_EN is disabled.
1: MDDR_EDAC_2E_EN is enabled.
13 CAN_EDAC_2E_EN 0 Allows the 2-bit error EDAC for CAN status update to be disabled.
Allowed values:
0: CAN_EDAC_2E_EN is disabled.
1: CAN_EDAC_2E_EN is enabled.
12 CAN_EDAC_1E_EN 0 Allows the 1-bit error EDAC for CAN status update to be disabled.
Allowed values:
0: CAN_EDAC_1E_EN is disabled.
1: CAN_EDAC_1E_EN is enabled.
11 USB_EDAC_2E_EN 0 Allows the 2-bit error EDAC for USB status update to be disabled.
Allowed values:
0: USB_EDAC_2E_EN is disabled.
1: USB_EDAC_2E_EN is enabled.
10 USB_EDAC_1E_EN 0 Allows the 1-bit error EDAC for USB status update to be disabled.
Allowed values:
0: USB_EDAC_1E_EN is disabled.
1: USB_EDAC_1E_EN is enabled.
9 MAC_EDAC_RX_2E_EN 0 Allows the 2-bit error EDAC for Ethernet Rx RAM status update to
be disabled. Allowed values:
0: MAC_EDAC_RX_2E_EN is disabled.
1: MAC_EDAC_RX_2E_EN is enabled.
Table 136 • CLR_EDAC_COUNTERS (continued)
Bit
Number Name
Reset
Value Description

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