Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 22
3.5.1.3.1 General-Purpose Registers
R0-R12 are 32-bit general-purpose registers for data operations.
3.5.1.3.2 Stack Pointer
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register indicates the
stack pointer to use:
• 0: Main Stack Pointer (MSP). This is the reset value.
• 1: Process Stack Pointer (PSP)
On reset, the processor loads the MSP with the value from address 0x00000000.
3.5.1.3.3 Link Register
The Link Register (LR) is register R14. It stores the return information for subroutines, function calls, and
exceptions. On reset, the processor sets the LR value to 0xFFFFFFFF.
3.5.1.3.4 Program Counter
The Program Counter (PC) is register R15. It contains the current program address. On reset, the
processor loads the PC with the value of the reset vector, which is at address 0x00000004. Bit[0] of the
value is loaded into the EPSR T-bit and must be 1.
3.5.1.3.5 Program Status Register
The Program Status Register (PSR) combines:
• Application Program Status Register (APSR)
• Interrupt Program Status Register (IPSR)
• Execution Program Status Register (EPSR)
These registers are mutually exclusive bitfields in the 32-bit PSR. The bit assignments are shown in the
following figure.
Figure 6 • Program Status Register
EPSR RO Privileged 0x01000000 Execution Program Status Register
PRIMASK RW Privileged 0x00000000 Priority Mask Register
FAULTMASK RW Privileged 0x00000000 Fault Mask Register
BASEPRI RW Privileged 0x00000000 Base Priority Mask Register
CONTROL RW Privileged 0x00000000 CONTROL Register
1. Describes access type during program execution in Thread mode and Handler mode. Debug access can differ.
2. An entry of Either means privileged and unprivileged software can access the register.
The following sections describe these registers in detail.
Table 8 • Core Register Set Summary (continued)
Name Type
1
Required
privilege
2
Reset value Description
R0-R12 RW Either Unknown General-Purpose Registers
31 30 29 28 27 26 25 24 23
16 15 10 9 8 0
N Z C V Q
PSR
IPSR
EPSR
Reserved
Reserved
Reserved
Reserved Reserved
ICI/IT ICI/IT
T
ISR_NUMBER
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