Fabric Interface Controller
UG0331 User Guide Revision 15.0 783
24.9 SYSREG Control Registers for FIC_0 and FIC_1
Refer to the "System Register Block" section on page 670 for a detailed description of each register
and bit. The following table lists the control registers for FIC_0 and FIC_1 from the SYSREG block.
Table 782 • FAB_IF Register in the SYSREG Block
Register name
Register
Type
Flash
Write
Protect Reset Source Description
FAB_IF_CR RW-P Register SYSRESET_N Control register for fabric interface.
SOFT_RESET_CR RW-P Bit SYSRESET_N Generates software control interrupts
to the MSS peripherals.
MSSDDR_FACC1_CR RW-P Field CC_SYSRESET_N MSS DDR fabric alignment clock
controller 1 configuration register
MSSDDR_CLK_CALIB_STATUS RO – SYSRESET_N MSS DDR clock calibration status
register