Microsemi SmartFusion2 - Table 352 TEST

Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 49
3.6.2 CMSIS Functions
ISO/IEC C code cannot directly access some Cortex-M3 processor instructions. This section describes
intrinsic functions that can generate these instructions, provided by the CMSIS and that might be
provided by a C compiler. If a C compiler does not support an appropriate intrinsic function, you might
have to use inline assembler to access some instructions.
The following table lists the intrinsic functions that the CMSIS provides to generate instructions that
ISO/IEC C code cannot directly access.
TBH [Rn, Rm, LSL #1] Table Branch Halfword
TEQ Rn, Op2 Test Equivalence N, Z, C
TST Rn, Op2 Test N, Z, C
UBFX Rd, Rn, #lsb, #width Unsigned Bit Field Extract
UDIV {Rd,} Rn, Rm Unsigned Divide
UMLAL RdLo, RdHi, Rn, Rm Unsigned Multiply with Accumulate
(32 x 32 + 64), 64-bit result
UMULL RdLo, RdHi, Rn, Rm Unsigned Multiply (32 x 32), 64-bit result
USAT Rd, #n, Rm {,shift #s} Unsigned Saturate Q
UXTB {Rd,} Rm {,ROR #n} Zero extend a Byte
UXTH {Rd,} Rm {,ROR #n} Zero extend a Halfword
WFE Wait for Event
WFI Wait for Interrupt
Table 27 • CMSIS Functions to Generate some Cortex-M3 Processor instructions
Instruction CMSIS function
CPSIE I void __enable_irq(void)
CPSID I void __disable_irq(void)
CPSIE F void __enable_fault_irq(void)
CPSID F void __disable_fault_irq(void)
ISB void __ISB(void)
DSB void __DSB(void)
DMB void __DMB(void)
REV uint32_t __REV(uint32_t int value)
REV16 uint32_t __REV16(uint32_t int value)
REVSH uint32_t __REVSH(uint32_t int value)
RBIT uint32_t __RBIT(uint32_t int value)
SEV void __SEV(void)
WFE void __WFE(void)
WFI void __WFI(void)
Table 26 • Cortex-M3 Processor Instructions (continued)
Mnemonic Operands Brief description Flags