Ethernet MAC
UG0331 User Guide Revision 15.0 427
8 M1RAL 0x1 Mask register 1 RALN counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
7 M1RFL 0x1 Mask register 1 RFLR counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
6 M1RCD 0x1 Mask register 1 RCDE counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
5 M1RCS 0x1 Mask register 1 RCSE counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
4 M1 RUN 0x1 Mask register 1 RUND counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
3 M1ROV 0x1 Mask register 1 ROVR counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
2 M1RFR 0x1 Mask register 1 RFRG counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
1 M1RJB 0x1 Mask register 1 RJBR counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
0 M1RDR 0x1 Mask register 1 RDRP counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
Table 424 • CAM2
Bit Number Name Reset Value Description
[31:20] Reserved 0x0 Reserved
19 M2TJB 0x1 Mask register 2 TJBR counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
18 M2TFC 0x1 Mask register 2 TXFC counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
17 M2TCF 0x1 Mask register 2 TXCF counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
16 M2TOV 0x1 Mask register 2 TOVR counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
15 M2TUN 0x1 Mask register 2 TUND counter carry bit
0: Unmask the counter carry bit
1: Mask the counter carry bit
Table 423 • CAM1 (continued)
Bit Number Name Reset Value Description