Microsemi SmartFusion2 - Revision 5.0; Revision 4.0

Revision History
UG0331 User Guide Revision 15.0 3
1.10 Revision 6.0
The following changes were made in revision 3.0 of this document.
• Added a note to Trace Port Interface Unit (TPIU) Configuration, page 17 (SAR 55243).
• Updated Table 3, page 14 and Ta ble 4 , page 15 (SAR 51221).
• Updated Table 4, page 15 (SAR 57010)
• Updated Memory System Ordering of Memory Accesses, page 30 (SAR 49728).
• Updated Power Management, page 45 (SAR 50897).
• Changed S bus to SBUS in Cache Controller, page 133 (SAR 48038)
• Added a note to Cache Locked Mode, page 141 (SAR 46463).
• Added notes in How to Use eNVM, page 165 (SARs 47902, 46463, 55243, and 49367).
• Updated Set Lock Bit and User Unlock Commands, page 153 (SAR 55728).
• Added a note to Page Program, page 152 (SAR 56496).
• Updated the document (SARs 46656, 57682, 55965, and 52508).
• Added eNVM Program and Verify Operations Timing Diagrams, page 155 (SAR 44080).
• Updated the HPDMA Details of Operation, page 241 (SARs 48855 and 46151).
• Updated Posted APB Writes, page 270 (SAR 48614).
• Added a note to PHY Interfaces, page 287 and to ULPI (UTMI+ Low Pin Interface) I/O Interface,
page 287 (SAR 50776).
• Updated Table 323, page 381 (SAR 51248)
• Updated Table 321, page 378 (SAR 52741)
• Added CoreMACFilter Overview, page 434 (SAR 58615).
• Updated Table 500, page 528 for TXRXDFCOUNT value (SAR 48912).
• Updated MSS GPIO Functional Description, page 563 (SAR 41775)
• Added a note to Table 543, page 577 (SAR 51119).
• Added a note to Power-On Reset Generation Sequence, page 643 (SAR 56613).
• Updated Table 763, page 736 for bit numbers (SAR 52993).
• Updated Table 772, page 749 (SAR 50361).
• Updated the introductory content of Fabric Interface Controller, page 757, and added a note to
Figure 336, page 766 (SAR 56584).
• Updated Embedded NVM (eNVM) Controllers, page 145, Embedded SRAM (eSRAM) Controllers,
page 187, AHB Bus Matrix, page 210, High Performance DMA Controller,
page 236, Peripheral
DMA, page 264, Serial Peripheral Interface Controller, page 504, Communication Block, page 592,
System Register Block, page 670, Fabric Interface Interrupt Controller, page 738, and Fabric
Interface Controller, page 757 chapters for FTC comments (SAR 56085).
1.11 Revision 5.0
The following changes were made in revision 3.0 of this document.
• Updated the document (SAR 53559).
• Updated Figure 289, page 657 and Figure 290, page 657 (SAR 53672).
• Updated Figure 356, page 782 (SAR 54025).
1.12 Revision 4.0
The following changes were made in revision 4.0 of this document.
• Corrected all instances of baud rate (SAR 47848).
• References to 1.0 v were removed (SAR 46823).
• Updated Features, page 133 of Cache Controller, page 133 (SAR 42397).
• Added a reference to the Remapping eNVM, eSRAM, and DDR/SDR SDRAM Memories application
note (SAR 47903).
• Updated Figure 57, page 134 (SAR 48354).
• Updated eNVMTheory of Operation, page 148 (SARs 47905 and 50072).
• Updated Figure 112, page 225, Figure 113, page 226, and Figure 117, page 230, Tab l e 14 2,
page 220, and Table 146, page 232 (SARs 39867 and 48605).
• Updated the direction for ULPI_XCLK in Table 190, page 287 (SAR 48602).
• Updated Table 344, page 400 (SAR 46933).
• Updated Figure 239, page 562 (SAR 48715).