Microsemi SmartFusion2 - Register Map; Table 133 MM3_6_7_8_SECURITY; Table 147 AHB Bus Matrix Register Map

AHB Bus Matrix
UG0331 User Guide Revision 15.0 235
the WRR master is accessing the slave. Slave maximum latency can be configured from 1 to 8
clock cycles (8 by default).
Note: ESRAM_MAX_LAT is only supported for fixed priority masters addressing eSRAM slaves. It has no
effect on WRR masters.
3. Generate the component by clicking Generate Component or by selecting SmartDesign >
Generate Component. For more information on generation of the component, refer to the
Libero SoC User Guide.
4. Click Generate Bitstream under Program Design to complete *.fdb file generation.
Note: The MSS AHB Bus Matrix supports full behavioral simulation models. Refer to the SmartFusion2 MSS
BFM Simulation User Guide for information.
7.3 Register Map
The following table lists the AHB bus matrix control registers in the SYSREG block.
Table 147 • AHB Bus Matrix Register Map
Register Name
Register
Type
Flash
Write
Protect Reset Source Description
MASTER_WEIGHT0_CR RW-P Register SYSRESET_N Configures WRR master arbitration scheme for
masters.
MASTER_WEIGHT1_CR RW-P Register SYSRESET_N Configures WRR master arbitration scheme for
masters.
MM0_1_2_SECURITY RO-U N/A SYSRESET_N Security bits for masters 0, 1, and 2
MM4_5_DDR_FIC_SECURIT
Y/MM4_5_FIC64_SECURITY
RO-U N/A SYSRESET_N Security bits for masters 4, 5, and DDR_FIC
MM3_6_7_8_SECURITY RO-U N/A SYSRESET_N Security bits for masters 3, 6, 7, and 8
MM9_SECURITY RO-U N/A SYSRESET_N Security bits for master 9
MSS_EXTERNAL_SR SW1C N/A SYSRESET_N AHB bus matrix error status. Writing a 1 clears
the status.
ESRAM_CR RW-P Register SYSRESET_N This register configures eSRAM.
ENVM_CR RW-P Register SYSRESET_N This register configures eNVM parameters.
ESRAM_MAX_LAT RW-P Register SYSRESET_N This register configures maximum latency for
accessing eSRAM0/1 slave.
ENVM_REMAP_BASE_CR RW-P Register SYSRESET_N This signal indicates the base address of the
segment in eNVM which is to be remapped to
location 0H.
ENVM_REMAP_FAB_CR RW-P Register SYSRESET_N Configures where eNVM is mapped in fabric
master space.
DDRB_NB_ADDR_CR RW-P Register SYSRESET_N This register indicates the base address of the
non-bufferable address region.
DDRB_NB_SIZE_CR RW-P Register SYSRESET_N This register indicates the size of the non-
bufferable address region.
DDR_CR RW-P Register SYSRESET_N This register configures DDR parameters.