Universal Serial Bus OTG Controller
UG0331 User Guide Revision 15.0 329
10.3.6.22 Polling Intervals for Transfer Types
10.3.6.23 RX_TYPE_REG (Host mode only) Bit Definitions
10.3.6.24 RX_INTERVAL_REG (Host mode only) Bit Definitions
Table 233 • Polling Intervals for Transfer Types
Transfer Type Speed Valid Value (m) Interpretation
Interrupt Low speed or full speed 1 – 255 Polling interval is m frames.
High speed 1 – 16 Polling interval is 2(m – 1) microframes.
Isochronous Full speed or high speed 1 – 16 Polling interval is 2(m –1) frames/microframes.
Bulk Full speed or high speed 2 – 16 NAK Limit is 2(m – 1) frames/microframes.
A value of 0 or 1 disables the NAK timeout function.
Table 234 • RX_TYPE_REG
Bit
Number Name
Reset
Value Function
[7:6] Speed 0 Operating speed of the target device:
00: Unused (If selected, the target is assumed to be using the same
connection speed as the USB controller.)
01: High
10: Full
11: Low
When the core is not configured with the multipoint option, these bits
should not be accessed.
[5:4] Protocol 0 The Cortex-M3 processor (or fabric master) should set this to select
the required protocol for the receive endpoint:
00: Control
01: ISO
10: Bulk
11: Interrupt
[3:0] Target Endpoint Number 0 The Cortex-M3 processor (or fabric master) should set this value to
the endpoint number contained in the receive endpoint descriptor
returned to the USB controller during device enumeration.
Table 235 • RX_INTERVAL_REG
Bit
Number Name
Reset
Value Function
[7:0] Rx Polling Interval/NAK
Limit (m)
0 Defines the polling interval for the currently selected receive endpoint
for Interrupt and ISO transfers. For bulk endpoints, this register sets
the number of frames/microframes after which the endpoint should
timeout on receiving stream of NAK responses.
There is one such register for each configured transmit endpoint
(except endpoint 0). In each case the value that is set defines a
number of frames/microframes (high speed transfers), as given in
Table 233 on page 329.
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