Microsemi SmartFusion2 - Initialization

MMUART Peripherals
UG0331 User Guide Revision 15.0 473
13.2.3 Initialization
This sub-section describes the MMUART initialization sequence, reset, clock requirements, and
interrupts. The MMUART can be initialized by configuring the MMUART control registers and
SOFT_RESET_CR system registry.
13.2.3.1 MMUART Initialization Sequence
1. Release the MMUART from reset by using SOFT_RESET_CR system registry (Tab le 46 5,
page 474)
2. Disable the MMUART interrupts by using Interrupt Enable Register (IER Ta bl e 47 5 , page 494)
3. Clear the Transmit and receive FIFO of MMUART by using FIFO Control Register (FCR Table 470,
page 491)
4. Clear the loopback and remote loopback modes by using Modem Control Register (MCR Table 481,
page 497)
5. Configure MMUART to send/receive MSB or LSB as a first bit by using Multi-Mode Control Register
1 (MM1 Table 486, page 501)
6. Set default transmit and receive ready by using ENABLE_TXRDY_RXRDY bit of FIFO Control
Register (FCR Ta b le 4 70 , page 491)
7. Disable 9-bit address flag mode and single wire mode by using Multi-Mode Control Register 2 (MM2
Table 487, page 501)
8. Disable transmit time guard and fractional baud rate by using Multi-Mode Control Register 0(MM0
Table 485, page 500).
9. Set default Receive timeout by using Multi-Mode Control Register 0(MM0) and Receiver Timeout
Register (RTO Ta bl e 49 0, page 503)
10. Set transmit time guard by using Transmitter Time Guard Register (TTG Table 489, page 503),
11. Set input filter length to suppress spikes by using Glitch Filter Register (GFR Table Ta ble 4 88,
page 502)
12. Configure the baud rate of MMUART by using Baud Rate Registers (DLR, DMR, and DFR).
13. Set the word length, stop bits and parity of MMUART by using Line Control Register (LCR Ta bl e 48 0,
page 496)
14. Disable LIN header detection and automatic baud rate calculation, RZI modulation/demodulation
and smart card modes by using ELIN(MM0), EIRD(MM1), and EERR(MM2) bits.
MMUART_X_E_MST_SCK Output High Enable master clock.
This active High signal is used as a bi-directional enable for the
SCK_IN and SCK_OUT signals. If these signals are taken from a
single
bi-directional pad, E_MST_SCK active High designates Master mode
and forces the bi-directional pad as an output, otherwise (in case of
active Low) the pad is an input for SCK_IN.
MMUART_X_OUT1 Output Low Output 1.
This active Low output is a user-defined signal. It is programmed by
the processor via the MCR and is set to the opposite value. It can be
used as a bi-directional pad enable for bi-directional topology use
models.
MMUART_X_OUT2 Output Low Output 2.
This active Low output signal is a user-defined signal. It is
programmed by the processor via the MCR and is set to the opposite
value.
Table 464 • MMUART I/O Signal Descriptions (continued)
Name Type Polarity Description