Fabric Interface Controller
UG0331 User Guide Revision 15.0 771
4. Connect the subsystem together; this can be done in two ways:
Automatic Connection: Right-click in the top-level SmartDesign canvas and select the Auto Con-
nect option. This connects the FPGA fabric peripherals to the MSS FIC interfaces through the
CoreAHBLite bus and CoreAPB3 bus.
Manual Connection:
• Connect the CoreAHBLite mirrored-master bus interface (BIF) port M1 to the MSS master BIF
port (FIC_0/1_AHB_MASTER), as shown in the following figure.
• Connect the AHB-Lite slaves to the proper slots as per your memory map requirement.
• Clocks and resets; refer to the Configuring the FIC Subsystem Clocks, page 774 and
Configuring the FIC Subsystem Reset, page 778.
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