Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 89
3.6.10.2.1 Syntax
CPSeffect iflags
where:
• effect is one of:
•
IE
: Clears the special purpose register.
•
ID
: Sets the special purpose register.
• iflags is a sequence of one or more flags:
•
i:
Set or clear PRIMASK.
•
f
: Set or clear FAULTMASK.
3.6.10.2.2 Operation
CPS
changes the PRIMASK and FAULTMASK special register values. See Exception Mask Registers,
page 25 for more information about these registers.
3.6.10.2.3 Restrictions
The restrictions are:
• use
CPS
only from privileged software, it has no effect if used in unprivileged software
•
CPS
cannot be conditional and so must not be used inside an IT block.
3.6.10.2.4 Condition Flags
This instruction does not change the condition flags.
Examples
CPSID i ; Disable interrupts and configurable fault handlers (set PRIMASK)
CPSID f ; Disable interrupts and all fault handlers (set FAULTMASK)
CPSIE i ; Enable interrupts and configurable fault handlers (clear PRIMASK)
CPSIE f ; Enable interrupts and fault handlers (clear FAULTMASK).
3.6.10.3 DMB
Data Memory Barrier.
3.6.10.3.1 Syntax
DMB{cond}
where:
cond is an optional condition code, see Conditional Execution, page 55.
3.6.10.3.2 Operation
DMB
acts as a data memory barrier. It ensures that all explicit memory accesses that appear, in program
order, before the
DMB
instruction are completed before any explicit memory accesses that appear, in
program order, after the
DMB
instruction.
DMB
does not affect the ordering or execution of instructions that
do not access memory.
3.6.10.3.3 Condition Flags
This instruction does not change the flags.
Examples
DMB ; Data Memory Barrier
To Next Page
Loading...
